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9 changed files with 1080 additions and 9 deletions

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Cargo.lock generated
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"nom-training", "nom-training",
"pico-blink",
"result-extended", "result-extended",
"screenplay", "screenplay",
"sgf", "sgf",

View File

@ -23,8 +23,9 @@
pkgs.mkShell { pkgs.mkShell {
name = "ld-tools-devshell"; name = "ld-tools-devshell";
buildInputs = [ buildInputs = [
pkgs.libadwaita pkgs.cargo-nextest
pkgs.clang pkgs.clang
pkgs.crate2nix
pkgs.entr pkgs.entr
pkgs.glade pkgs.glade
pkgs.glib pkgs.glib
@ -34,16 +35,16 @@
pkgs.gst_all_1.gst-plugins-ugly pkgs.gst_all_1.gst-plugins-ugly
pkgs.gst_all_1.gstreamer pkgs.gst_all_1.gstreamer
pkgs.gtk4 pkgs.gtk4
pkgs.libadwaita
pkgs.nodejs pkgs.nodejs
pkgs.openssl pkgs.openssl
pkgs.pipewire pkgs.pipewire
pkgs.pkg-config pkgs.pkg-config
pkgs.sqlite
pkgs.rustup pkgs.rustup
pkgs.cargo-nextest pkgs.sqlite
pkgs.crate2nix
pkgs.wasm-pack
pkgs.sqlx-cli pkgs.sqlx-cli
pkgs.udev
pkgs.wasm-pack
typeshare.packages."x86_64-linux".default typeshare.packages."x86_64-linux".default
]; ];
LIBCLANG_PATH="${pkgs.llvmPackages.libclang.lib}/lib"; LIBCLANG_PATH="${pkgs.llvmPackages.libclang.lib}/lib";

36
memory.x Normal file
View File

@ -0,0 +1,36 @@
MEMORY {
BOOT2 : ORIGIN = 0x10000000, LENGTH = 0x100
FLASH : ORIGIN = 0x10000100, LENGTH = 2048K - 0x100
/*
* RAM consists of 4 banks, SRAM0-SRAM3, with a striped mapping.
* This is usually good for performance, as it distributes load on
* those banks evenly.
*/
RAM : ORIGIN = 0x20000000, LENGTH = 256K
/*
* RAM banks 4 and 5 use a direct mapping. They can be used to have
* memory areas dedicated for some specific job, improving predictability
* of access times.
* Example: Separate stacks for core0 and core1.
*/
SRAM4 : ORIGIN = 0x20040000, LENGTH = 4k
SRAM5 : ORIGIN = 0x20041000, LENGTH = 4k
/* SRAM banks 0-3 can also be accessed directly. However, those ranges
alias with the RAM mapping, above. So don't use them at the same time!
SRAM0 : ORIGIN = 0x21000000, LENGTH = 64k
SRAM1 : ORIGIN = 0x21010000, LENGTH = 64k
SRAM2 : ORIGIN = 0x21020000, LENGTH = 64k
SRAM3 : ORIGIN = 0x21030000, LENGTH = 64k
*/
}
EXTERN(BOOT2_FIRMWARE)
SECTIONS {
/* ### Boot loader */
.boot2 ORIGIN(BOOT2) :
{
KEEP(*(.boot2));
} > BOOT2
} INSERT BEFORE .text;

12
pico-blink/.cargo/config Normal file
View File

@ -0,0 +1,12 @@
[build]
target = "thumbv6m-none-eabi"
[target.thumbv6m-none-eabi]
rustflags = [
"-C", "link-arg=--nmagic",
"-C", "link-arg=-Tlink.x",
"-C", "inline-threshold=5",
"-C", "no-vectorize-loops",
]
runner = "elf2uf2-rs -d"

413
pico-blink/Cargo.lock generated Normal file
View File

@ -0,0 +1,413 @@
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# It is not intended for manual editing.
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14
pico-blink/Cargo.toml Normal file
View File

@ -0,0 +1,14 @@
[package]
name = "pico-blink"
version = "0.1.0"
edition = "2021"
# See more keys and their definitions at https://doc.rust-lang.org/cargo/reference/manifest.html
[dependencies]
cortex-m = "0.7.7"
cortex-m-rt = "0.7.3"
embedded-hal = "0.2.7"
fugit = "0.3.7"
panic-halt = "0.2.0"
rp-pico = "0.8.0"

246
pico-blink/src/main.rs Normal file
View File

@ -0,0 +1,246 @@
#![no_main]
#![no_std]
use embedded_hal::blocking::spi::Write;
use embedded_hal::digital::v2::OutputPin;
use fugit::RateExtU32;
use panic_halt as _;
use rp_pico::entry;
use rp_pico::hal::gpio::{FunctionSio, PinId, PullType, SioOutput};
use rp_pico::{
hal,
hal::prelude::*,
hal::{
clocks::{init_clocks_and_plls, Clock},
gpio::Pin,
pac,
spi::Spi,
watchdog::Watchdog,
},
};
fn send_byte<I, J, P>(
data: &mut Pin<I, FunctionSio<SioOutput>, P>,
clock: &mut Pin<J, FunctionSio<SioOutput>, P>,
delay: &mut cortex_m::delay::Delay,
byte: u8,
) where
I: PinId,
J: PinId,
P: PullType,
{
(0..8).for_each(|bit| {
if byte & (1 << (8 - bit)) > 0 {
data.set_high();
} else {
data.set_low();
}
clock.set_high();
delay.delay_us(100);
clock.set_low();
delay.delay_us(100);
});
clock.set_low();
}
fn send_start<I, J, P>(
data: &mut Pin<I, FunctionSio<SioOutput>, P>,
clock: &mut Pin<J, FunctionSio<SioOutput>, P>,
delay: &mut cortex_m::delay::Delay,
) where
I: PinId,
J: PinId,
P: PullType,
{
send_byte(data, clock, delay, 0);
send_byte(data, clock, delay, 0);
send_byte(data, clock, delay, 0);
send_byte(data, clock, delay, 0);
}
fn send_term<I, J, P>(
data: &mut Pin<I, FunctionSio<SioOutput>, P>,
clock: &mut Pin<J, FunctionSio<SioOutput>, P>,
delay: &mut cortex_m::delay::Delay,
) where
I: PinId,
J: PinId,
P: PullType,
{
send_byte(data, clock, delay, 0xff);
send_byte(data, clock, delay, 0xff);
send_byte(data, clock, delay, 0xff);
send_byte(data, clock, delay, 0xff);
}
fn send<I, J, P>(
data: &mut Pin<I, FunctionSio<SioOutput>, P>,
clock: &mut Pin<J, FunctionSio<SioOutput>, P>,
delay: &mut cortex_m::delay::Delay,
values: &[u8],
) where
I: PinId,
J: PinId,
P: PullType,
{
send_start(data, clock, delay);
for val in values {
send_byte(data, clock, delay, *val);
}
send_term(data, clock, delay);
clock.set_low();
}
#[entry]
fn main() -> ! {
let mut pac = pac::Peripherals::take().unwrap();
let core = pac::CorePeripherals::take().unwrap();
let sio = hal::Sio::new(pac.SIO);
let mut watchdog = Watchdog::new(pac.WATCHDOG);
let pins = rp_pico::Pins::new(
pac.IO_BANK0,
pac.PADS_BANK0,
sio.gpio_bank0,
&mut pac.RESETS,
);
let external_xtal_freq_hz = 12_000_000u32;
let clocks = init_clocks_and_plls(
external_xtal_freq_hz,
pac.XOSC,
pac.CLOCKS,
pac.PLL_SYS,
pac.PLL_USB,
&mut pac.RESETS,
&mut watchdog,
)
.ok()
.unwrap();
let mut delay = cortex_m::delay::Delay::new(core.SYST, clocks.system_clock.freq().to_Hz());
/*
let mut spi_clk = pins.gpio10.into_function();
let mut spi_sdo = pins.gpio11.into_function();
let spi = Spi::<_, _, _, 8>::new(pac.SPI1, (spi_sdo, spi_clk));
let mut spi = spi.init(
&mut pac.RESETS,
clocks.peripheral_clock.freq(),
1.MHz(),
embedded_hal::spi::MODE_1,
);
*/
let mut led_pin = pins.led.into_push_pull_output();
let mut blue_pin = pins.gpio3.into_push_pull_output();
led_pin.set_high().unwrap();
delay.delay_ms(500);
led_pin.set_low().unwrap();
let mut spi_clk = pins.gpio10.into_push_pull_output();
let mut spi_sdo = pins.gpio11.into_push_pull_output();
spi_clk.set_low();
spi_sdo.set_low();
let bits_1 = &[
0, 0, 0, 0,
0xe1, 0x80, 0x00, 0x00,
0xe1, 0x00, 0x80, 0x00,
0xe1, 0x00, 0x00, 0x80,
0xe1, 0x80, 0x00, 0x00,
0xe1, 0x00, 0x80, 0x00,
0xe1, 0x00, 0x00, 0x80,
0xe1, 0x80, 0x00, 0x00,
0xe1, 0x00, 0x80, 0x00,
0xe1, 0x00, 0x00, 0x80,
0xe1, 0x80, 0x00, 0x00,
0xe1, 0x00, 0x80, 0x00,
0xe1, 0x00, 0x00, 0x80,
0xff, 0xff, 0xff, 0xff,
];
let bits_2 = &[
0, 0, 0, 0,
0xe1, 0x00, 0x80, 0x00,
0xe1, 0x00, 0x00, 0x80,
0xe1, 0x80, 0x00, 0x00,
0xe1, 0x00, 0x80, 0x00,
0xe1, 0x00, 0x00, 0x80,
0xe1, 0x80, 0x00, 0x00,
0xe1, 0x00, 0x80, 0x00,
0xe1, 0x00, 0x00, 0x80,
0xe1, 0x80, 0x00, 0x00,
0xe1, 0x00, 0x80, 0x00,
0xe1, 0x00, 0x00, 0x80,
0xe1, 0x80, 0x00, 0x00,
0xff, 0xff, 0xff, 0xff,
];
let bits_3 = &[
0, 0, 0, 0,
0xe1, 0x00, 0x00, 0x80,
0xe1, 0x80, 0x00, 0x00,
0xe1, 0x00, 0x80, 0x00,
0xe1, 0x00, 0x00, 0x80,
0xe1, 0x80, 0x00, 0x00,
0xe1, 0x00, 0x80, 0x00,
0xe1, 0x00, 0x00, 0x80,
0xe1, 0x80, 0x00, 0x00,
0xe1, 0x00, 0x80, 0x00,
0xe1, 0x00, 0x00, 0x80,
0xe1, 0x80, 0x00, 0x00,
0xe1, 0x00, 0x80, 0x00,
0xff, 0xff, 0xff, 0xff,
];
let a = 15 / 2;
loop {
send(
&mut spi_sdo,
&mut spi_clk,
&mut delay,
bits_1,
);
spi_clk.set_low();
spi_sdo.set_low();
delay.delay_ms(500);
send(
&mut spi_sdo,
&mut spi_clk,
&mut delay,
bits_2,
);
spi_clk.set_low();
spi_sdo.set_low();
delay.delay_ms(500);
send(
&mut spi_sdo,
&mut spi_clk,
&mut delay,
bits_3,
);
spi_clk.set_low();
spi_sdo.set_low();
delay.delay_ms(500);
/*
spi.write(bits_1);
delay.delay_ms(500);
spi.write(bits_2);
delay.delay_ms(500);
spi.write(bits_3);
delay.delay_ms(500);
*/
/*
led_pin.set_high().unwrap();
blue_pin.set_low().unwrap();
delay.delay_ms(500);
led_pin.set_low().unwrap();
blue_pin.set_high().unwrap();
delay.delay_ms(500);
*/
}
}

View File

@ -1,3 +1,3 @@
[toolchain] [toolchain]
channel = "1.71.1" channel = "1.73.0"
targets = [ "wasm32-unknown-unknown" ] targets = [ "wasm32-unknown-unknown" ]