savanni
/
ruduino
1
0
Fork 0
Code Issues Pull Requests Projects Releases Wiki Activity

Replace regular memory read/writes with volatile memory read/writes 

Fixes #21.
This commit is contained in:
Dylan McKay 2020-07-31 22:00:33 +12:00
parent c7dfee4617
commit 3868326bca
1 changed files with 6 additions and 6 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

12
src/register.rs
View File

@ -31,14 +31,14 @@ pub trait Register : Sized {
#[inline(always)]
fn write<V>(value: V) where V: Into<Self::T> {
unsafe {
*Self::ADDRESS = value.into();
core::ptr::write_volatile(Self::ADDRESS, value.into());
}
}
/// Reads the value of the register.
#[inline(always)]
fn read() -> Self::T {
unsafe { *Self::ADDRESS }
unsafe { core::ptr::read_volatile(Self::ADDRESS) }
}
/// Sets a set of bits to `1` in the register.
@ -69,7 +69,7 @@ pub trait Register : Sized {
#[inline(always)]
fn unset_mask_raw(mask: Self::T) {
unsafe {
*Self::ADDRESS &= !mask;
core::ptr::write_volatile(Self::ADDRESS, core::ptr::read_volatile(Self::ADDRESS) & !mask)
}
}
@ -88,7 +88,7 @@ pub trait Register : Sized {
#[inline(always)]
fn toggle_raw(mask: Self::T) {
unsafe {
*Self::ADDRESS ^= mask;
core::ptr::write_volatile(Self::ADDRESS, core::ptr::read_volatile(Self::ADDRESS) ^ mask)
}
}
@ -106,7 +106,7 @@ pub trait Register : Sized {
#[inline(always)]
fn is_mask_set_raw(mask: Self::T) -> bool {
unsafe {
(*Self::ADDRESS & mask) == mask
(core::ptr::read_volatile(Self::ADDRESS) & mask) == mask
}
}
@ -124,7 +124,7 @@ pub trait Register : Sized {
#[inline(always)]
fn is_clear_raw(mask: Self::T) -> bool {
unsafe {
(*Self::ADDRESS & mask) == Self::T::from(0)
(core::ptr::read_volatile(Self::ADDRESS) & mask) == Self::T::from(0)
}
}