From 61c62ad0ed4e5efaa2ef3004efa6ca139579566c Mon Sep 17 00:00:00 2001 From: Dylan McKay Date: Sun, 17 Dec 2017 13:14:10 +1300 Subject: [PATCH] Merge Mask and Bitset, remove Bitset There isn't as much value as I thought in making the distinction. --- core_generator/build.rs | 2 +- core_generator/gen.rs | 6 +++--- src/lib.rs | 2 +- src/modules/timer/timer16.rs | 6 +++--- src/modules/timer/timer8.rs | 6 +++--- src/register.rs | 42 ------------------------------------ 6 files changed, 11 insertions(+), 53 deletions(-) diff --git a/core_generator/build.rs b/core_generator/build.rs index 7252cc7..72c015c 100644 --- a/core_generator/build.rs +++ b/core_generator/build.rs @@ -73,7 +73,7 @@ fn generate_cores_mod_rs(mcus: &[Mcu]) -> Result<(), io::Error> { fn write_core_module(mcu: &Mcu, w: &mut Write) -> Result<(), io::Error> { writeln!(w, "//! Core for {}.", mcu.device.name)?; writeln!(w)?; - writeln!(w, "use {{Mask, Bitset, Register}};")?; + writeln!(w, "use {{Mask, Register}};")?; writeln!(w, "use modules;")?; writeln!(w)?; diff --git a/core_generator/gen.rs b/core_generator/gen.rs index 40fe789..331b021 100644 --- a/core_generator/gen.rs +++ b/core_generator/gen.rs @@ -15,7 +15,7 @@ pub fn write_registers(mcu: &Mcu, w: &mut Write) -> Result<(), io::Error> { writeln!(w, "impl {} {{", register.name)?; for bitfield in register.bitfields.iter() { // Create a mask for the whole bitset. - writeln!(w, " pub const {}: Bitset = Bitset::new(0x{:x});", bitfield.name, bitfield.mask)?; + writeln!(w, " pub const {}: Mask = Mask::new(0x{:x});", bitfield.name, bitfield.mask)?; // We create masks for the individual bits in the field if there // is more than one bit in the field. @@ -186,7 +186,7 @@ pub fn write_timers(mcu: &Mcu, w: &mut Write) -> Result<(), io::Error> { writeln!(w, " const WGM0: Mask = Self::ControlA::WGM00;")?; writeln!(w, " const WGM1: Mask = Self::ControlA::WGM01;")?; writeln!(w, " const WGM2: Mask = Self::ControlB::WGM020;")?; - writeln!(w, " const OCIEA: Bitset = Self::InterruptMask::OCIE0A;")?; + writeln!(w, " const OCIEA: Mask = Self::InterruptMask::OCIE0A;")?; writeln!(w, "}}")?; } @@ -221,7 +221,7 @@ pub fn write_timers(mcu: &Mcu, w: &mut Write) -> Result<(), io::Error> { writeln!(w, " const WGM1: Mask = Self::ControlA::WGM11;")?; writeln!(w, " const WGM2: Mask = Self::ControlB::WGM10;")?; writeln!(w, " const WGM3: Mask = Self::ControlB::WGM11;")?; - writeln!(w, " const OCIEA: Bitset = Self::InterruptMask::OCIE1A;")?; + writeln!(w, " const OCIEA: Mask = Self::InterruptMask::OCIE1A;")?; writeln!(w, "}}")?; } diff --git a/src/lib.rs b/src/lib.rs index 770b487..a474a88 100644 --- a/src/lib.rs +++ b/src/lib.rs @@ -13,7 +13,7 @@ #![no_std] -pub use self::register::{Bitset, Mask, Register, RegisterValue}; +pub use self::register::{Mask, Register, RegisterValue}; pub use self::pin::{DataDirection, Pin}; pub mod prelude; diff --git a/src/modules/timer/timer16.rs b/src/modules/timer/timer16.rs index a7dfcb4..4dce3ab 100644 --- a/src/modules/timer/timer16.rs +++ b/src/modules/timer/timer16.rs @@ -1,4 +1,4 @@ -use {Bitset, Mask, Register}; +use {Mask, Register}; use core::marker; /// A 16-bit timer. @@ -50,7 +50,7 @@ pub trait Timer16 : Sized { const WGM2: Mask; const WGM3: Mask; - const OCIEA: Bitset; + const OCIEA: Mask; fn setup() -> Timer16Setup { Timer16Setup::new() } } @@ -204,7 +204,7 @@ impl Timer16Setup { T::CompareA::write(v); // Enable compare interrupt - T::OCIEA.set_all(); + T::InterruptMask::set(T::OCIEA); } } } diff --git a/src/modules/timer/timer8.rs b/src/modules/timer/timer8.rs index e2c2e2e..fa09717 100644 --- a/src/modules/timer/timer8.rs +++ b/src/modules/timer/timer8.rs @@ -1,4 +1,4 @@ -use {Bitset, Mask, Register}; +use {Mask, Register}; use core::marker; /// A 8-bit timer. @@ -44,7 +44,7 @@ pub trait Timer8 : Sized { const WGM1: Mask; const WGM2: Mask; - const OCIEA: Bitset; + const OCIEA: Mask; } pub enum ClockSource { @@ -176,7 +176,7 @@ impl Timer8Setup { T::CompareA::write(v); // Enable compare interrupt - T::OCIEA.set_all(); + T::InterruptMask::set(T::OCIEA); } } } diff --git a/src/register.rs b/src/register.rs index 7f11221..d642a80 100644 --- a/src/register.rs +++ b/src/register.rs @@ -128,13 +128,6 @@ pub trait Register : Sized { } } -/// A register bitmask. -#[derive(Copy, Clone, Debug, PartialEq, Eq, PartialOrd, Ord, Hash)] -pub struct Bitset { - mask: R::T, - _phantom: marker::PhantomData, -} - /// A register bitmask. #[derive(Copy, Clone, Debug, PartialEq, Eq, PartialOrd, Ord, Hash)] pub struct Mask { @@ -142,41 +135,6 @@ pub struct Mask { _phantom: marker::PhantomData, } -impl Bitset where R: Register { - /// Creates a new register mask. - pub const fn new(mask: R::T) -> Self { - Bitset { mask, _phantom: marker::PhantomData } - } - - /// Sets the mask in the register. - /// - /// This is equivalent to `r |= mask`. - pub fn set_all(self) { - R::set_raw(self.mask); - } - - /// Clears the mask from the register. - /// - /// This is equivalent to `r &= !mask`. - pub fn unset_all(self) { - R::unset_raw(self.mask); - } - - /// Toggles the masked bits in the register. - /// - /// This is equivalent to `r ^= mask`. - pub fn toggle_all(self) { - R::toggle_raw(self.mask); - } - - /// Checks if the mask is clear. - /// - /// This is equivalent to `(r & mask) == 0`. - pub fn is_clear(self) -> bool { - R::is_clear_raw(self.mask) - } -} - impl Mask where R: Register { /// Creates a new register mask. pub const fn new(mask: R::T) -> Self {