From 72b0169d5301a4f8a0393edad88dfd4aa65d7cbf Mon Sep 17 00:00:00 2001 From: Dylan McKay Date: Sat, 23 Sep 2017 16:50:01 +1200 Subject: [PATCH] Rename RegVal to Register --- src/lib.rs | 4 ++-- src/{reg.rs => register.rs} | 8 ++++---- src/spi.rs | 2 -- 3 files changed, 6 insertions(+), 8 deletions(-) rename src/{reg.rs => register.rs} (93%) diff --git a/src/lib.rs b/src/lib.rs index 6036bad..691ebce 100644 --- a/src/lib.rs +++ b/src/lib.rs @@ -8,7 +8,7 @@ #![no_std] -pub use self::reg::Register; +pub use self::register::{Register, RegisterValue}; pub use self::pin::Pin; pub use self::usart::HardwareUsart; @@ -20,7 +20,7 @@ pub mod cores; pub mod spi; -mod reg; +mod register; mod pin; mod usart; diff --git a/src/reg.rs b/src/register.rs similarity index 93% rename from src/reg.rs rename to src/register.rs index 194823f..7c18068 100644 --- a/src/reg.rs +++ b/src/register.rs @@ -1,6 +1,6 @@ use core::{cmp, convert, ops}; -pub trait RegVal : Copy + Clone + +pub trait RegisterValue : Copy + Clone + ops::BitAnd + ops::BitAndAssign + ops::BitOr + @@ -14,7 +14,7 @@ pub trait RegVal : Copy + Clone + } /// A register. -pub trait Register { +pub trait Register { /// The address of the register. const ADDR: *mut T; @@ -90,6 +90,6 @@ pub trait Register { } } -impl RegVal for u8 { } -impl RegVal for u16 { } +impl RegisterValue for u8 { } +impl RegisterValue for u16 { } diff --git a/src/spi.rs b/src/spi.rs index 216e24b..fbac626 100644 --- a/src/spi.rs +++ b/src/spi.rs @@ -1,6 +1,5 @@ use {Register, Pin}; - /// An SPI module. /// /// Information at @@ -149,7 +148,6 @@ pub mod control_register { } /// Constants for the status register. -#[allow(dead_code)] pub mod status_register { /// SPI interrupt flag. pub const SPIF: u8 = 1<<7;