Invert the direction of the Register<T> type parameter
This commit is contained in:
parent
0157a8553c
commit
cb6e0d3b69
39
build.rs
39
build.rs
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@ -102,7 +102,7 @@ mod gen {
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writeln!(w, "impl {} {{", register.name)?;
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writeln!(w, "impl {} {{", register.name)?;
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for bitfield in register.bitfields.iter() {
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for bitfield in register.bitfields.iter() {
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// Create a mask for the whole bitset.
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// Create a mask for the whole bitset.
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writeln!(w, " pub const {}: Bitset<{}, Self> = Bitset::new(0x{:x});", bitfield.name, ty, bitfield.mask)?;
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writeln!(w, " pub const {}: Bitset<Self> = Bitset::new(0x{:x});", bitfield.name, bitfield.mask)?;
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// We create masks for the individual bits in the field if there
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// We create masks for the individual bits in the field if there
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// is more than one bit in the field.
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// is more than one bit in the field.
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@ -110,8 +110,8 @@ mod gen {
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let mut current_mask_bit_num = 0;
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let mut current_mask_bit_num = 0;
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for current_register_bit_num in 0..15 {
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for current_register_bit_num in 0..15 {
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if (current_mask & 0b1) == 0b1 {
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if (current_mask & 0b1) == 0b1 {
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writeln!(w, " pub const {}{}: Mask<{}, Self> = Mask::new(1<<{});",
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writeln!(w, " pub const {}{}: Mask<Self> = Mask::new(1<<{});",
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bitfield.name, current_mask_bit_num, ty, current_register_bit_num)?;
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bitfield.name, current_mask_bit_num, current_register_bit_num)?;
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current_mask_bit_num += 1;
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current_mask_bit_num += 1;
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}
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}
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@ -122,7 +122,8 @@ mod gen {
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writeln!(w, "}}")?;
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writeln!(w, "}}")?;
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writeln!(w)?;
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writeln!(w)?;
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writeln!(w, "impl Register<{}> for {} {{", ty, register.name)?;
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writeln!(w, "impl Register for {} {{", register.name)?;
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writeln!(w, " type T = {};", ty)?;
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writeln!(w, " const ADDR: *mut {} = 0x{:x} as *mut {};", ty, register.offset, ty)?;
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writeln!(w, " const ADDR: *mut {} = 0x{:x} as *mut {};", ty, register.offset, ty)?;
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writeln!(w, "}}")?;
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writeln!(w, "}}")?;
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}
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}
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@ -266,13 +267,13 @@ mod gen {
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writeln!(w, " type ControlB = {};", find_reg_suffix("TCCR", "B").name)?;
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writeln!(w, " type ControlB = {};", find_reg_suffix("TCCR", "B").name)?;
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writeln!(w, " type InterruptMask = {};", find_reg("TIMSK").name)?;
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writeln!(w, " type InterruptMask = {};", find_reg("TIMSK").name)?;
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writeln!(w, " type InterruptFlag = {};", find_reg("TIFR").name)?;
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writeln!(w, " type InterruptFlag = {};", find_reg("TIFR").name)?;
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writeln!(w, " const CS0: Mask<u8, Self::ControlB> = Self::ControlB::CS00;")?;
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writeln!(w, " const CS0: Mask<Self::ControlB> = Self::ControlB::CS00;")?;
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writeln!(w, " const CS1: Mask<u8, Self::ControlB> = Self::ControlB::CS01;")?;
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writeln!(w, " const CS1: Mask<Self::ControlB> = Self::ControlB::CS01;")?;
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writeln!(w, " const CS2: Mask<u8, Self::ControlB> = Self::ControlB::CS02;")?;
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writeln!(w, " const CS2: Mask<Self::ControlB> = Self::ControlB::CS02;")?;
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writeln!(w, " const WGM0: Mask<u8, Self::ControlA> = Self::ControlA::WGM00;")?;
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writeln!(w, " const WGM0: Mask<Self::ControlA> = Self::ControlA::WGM00;")?;
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writeln!(w, " const WGM1: Mask<u8, Self::ControlA> = Self::ControlA::WGM01;")?;
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writeln!(w, " const WGM1: Mask<Self::ControlA> = Self::ControlA::WGM01;")?;
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writeln!(w, " const WGM2: Mask<u8, Self::ControlB> = Self::ControlB::WGM020;")?;
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writeln!(w, " const WGM2: Mask<Self::ControlB> = Self::ControlB::WGM020;")?;
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writeln!(w, " const OCIEA: Bitset<u8, Self::InterruptMask> = Self::InterruptMask::OCIE0A;")?;
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writeln!(w, " const OCIEA: Bitset<Self::InterruptMask> = Self::InterruptMask::OCIE0A;")?;
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writeln!(w, "}}")?;
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writeln!(w, "}}")?;
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}
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}
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@ -300,14 +301,14 @@ mod gen {
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writeln!(w, " type ControlC = {};", find_reg_suffix("TCCR", "C").name)?;
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writeln!(w, " type ControlC = {};", find_reg_suffix("TCCR", "C").name)?;
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writeln!(w, " type InterruptMask = {};", find_reg("TIMSK").name)?;
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writeln!(w, " type InterruptMask = {};", find_reg("TIMSK").name)?;
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writeln!(w, " type InterruptFlag = {};", find_reg("TIFR").name)?;
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writeln!(w, " type InterruptFlag = {};", find_reg("TIFR").name)?;
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writeln!(w, " const CS0: Mask<u8, Self::ControlB> = Self::ControlB::CS10;")?;
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writeln!(w, " const CS0: Mask<Self::ControlB> = Self::ControlB::CS10;")?;
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writeln!(w, " const CS1: Mask<u8, Self::ControlB> = Self::ControlB::CS11;")?;
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writeln!(w, " const CS1: Mask<Self::ControlB> = Self::ControlB::CS11;")?;
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writeln!(w, " const CS2: Mask<u8, Self::ControlB> = Self::ControlB::CS12;")?;
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writeln!(w, " const CS2: Mask<Self::ControlB> = Self::ControlB::CS12;")?;
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writeln!(w, " const WGM0: Mask<u8, Self::ControlA> = Self::ControlA::WGM10;")?;
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writeln!(w, " const WGM0: Mask<Self::ControlA> = Self::ControlA::WGM10;")?;
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writeln!(w, " const WGM1: Mask<u8, Self::ControlA> = Self::ControlA::WGM11;")?;
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writeln!(w, " const WGM1: Mask<Self::ControlA> = Self::ControlA::WGM11;")?;
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writeln!(w, " const WGM2: Mask<u8, Self::ControlB> = Self::ControlB::WGM10;")?;
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writeln!(w, " const WGM2: Mask<Self::ControlB> = Self::ControlB::WGM10;")?;
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writeln!(w, " const WGM3: Mask<u8, Self::ControlB> = Self::ControlB::WGM11;")?;
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writeln!(w, " const WGM3: Mask<Self::ControlB> = Self::ControlB::WGM11;")?;
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writeln!(w, " const OCIEA: Bitset<u8, Self::InterruptMask> = Self::InterruptMask::OCIE1A;")?;
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writeln!(w, " const OCIEA: Bitset<Self::InterruptMask> = Self::InterruptMask::OCIE1A;")?;
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writeln!(w, "}}")?;
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writeln!(w, "}}")?;
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}
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}
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@ -14,11 +14,11 @@ pub trait HardwareSpi {
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type SlaveSelect: Pin;
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type SlaveSelect: Pin;
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/// The SPI control register.
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/// The SPI control register.
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type ControlRegister: Register<u8>;
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type ControlRegister: Register<T=u8>;
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/// The SPI status register.
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/// The SPI status register.
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type StatusRegister: Register<u8>;
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type StatusRegister: Register<T=u8>;
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/// The SPI data register.
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/// The SPI data register.
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type DataRegister: Register<u8>;
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type DataRegister: Register<T=u8>;
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/// Sets up the SPI as a master.
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/// Sets up the SPI as a master.
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fn setup_master(clock: u32) {
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fn setup_master(clock: u32) {
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@ -2,57 +2,57 @@ use {Bitset, Mask, Register};
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use core::marker;
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use core::marker;
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/// A 16-bit timer.
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/// A 16-bit timer.
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pub trait Timer16 {
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pub trait Timer16 : Sized {
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/// The first compare register.
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/// The first compare register.
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/// For example, OCR0A.
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/// For example, OCR0A.
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type CompareA: Register<u16>;
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type CompareA: Register<T=u16>;
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/// The second compare register.
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/// The second compare register.
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/// For example, OCR0B.
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/// For example, OCR0B.
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type CompareB: Register<u16>;
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type CompareB: Register<T=u16>;
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/// The counter register.
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/// The counter register.
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///
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///
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/// For example, TCNT0.
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/// For example, TCNT0.
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type Counter: Register<u16>;
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type Counter: Register<T=u16>;
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/// The first control register.
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/// The first control register.
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///
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///
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/// For example, TCCR0A.
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/// For example, TCCR0A.
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type ControlA: Register<u8>;
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type ControlA: Register<T=u8>;
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/// The second control register.
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/// The second control register.
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///
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///
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/// For example, TCCR0B.
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/// For example, TCCR0B.
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type ControlB: Register<u8>;
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type ControlB: Register<T=u8>;
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/// The third control register.
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/// The third control register.
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///
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///
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/// For example, TCCR0C.
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/// For example, TCCR0C.
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type ControlC: Register<u8>;
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type ControlC: Register<T=u8>;
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/// The interrupt mask register.
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/// The interrupt mask register.
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///
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///
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/// For example, TIMSK0.
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/// For example, TIMSK0.
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type InterruptMask: Register<u8>;
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type InterruptMask: Register<T=u8>;
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/// The interrupt flag register.
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/// The interrupt flag register.
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///
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///
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/// For example, TIFR0.
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/// For example, TIFR0.
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type InterruptFlag: Register<u8>;
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type InterruptFlag: Register<T=u8>;
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const CS0: Mask<u8, Self::ControlB>;
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const CS0: Mask<Self::ControlB>;
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const CS1: Mask<u8, Self::ControlB>;
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const CS1: Mask<Self::ControlB>;
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const CS2: Mask<u8, Self::ControlB>;
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const CS2: Mask<Self::ControlB>;
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const WGM0: Mask<u8, Self::ControlA>;
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const WGM0: Mask<Self::ControlA>;
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const WGM1: Mask<u8, Self::ControlA>;
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const WGM1: Mask<Self::ControlA>;
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const WGM2: Mask<u8, Self::ControlB>;
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const WGM2: Mask<Self::ControlB>;
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const WGM3: Mask<u8, Self::ControlB>;
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const WGM3: Mask<Self::ControlB>;
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const OCIEA: Bitset<u8, Self::InterruptMask>;
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const OCIEA: Bitset<Self::InterruptMask>;
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fn setup() -> Timer16Setup<T> { Timer16Setup::new() }
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fn setup() -> Timer16Setup<Self> { Timer16Setup::new() }
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}
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}
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pub enum ClockSource {
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pub enum ClockSource {
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@ -67,7 +67,7 @@ pub enum ClockSource {
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}
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}
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impl ClockSource {
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impl ClockSource {
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fn bits<T: Timer16>(&self) -> Mask<u8, T::ControlB> {
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fn bits<T: Timer16>(&self) -> Mask<T::ControlB> {
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use self::ClockSource::*;
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use self::ClockSource::*;
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match *self {
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match *self {
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@ -83,7 +83,7 @@ impl ClockSource {
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}
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}
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#[inline]
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#[inline]
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fn mask<T: Timer16>() -> Mask<u8, T::ControlB> {
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fn mask<T: Timer16>() -> Mask<T::ControlB> {
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!(T::CS2 | T::CS1 | T::CS0)
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!(T::CS2 | T::CS1 | T::CS0)
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}
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}
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}
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}
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@ -109,7 +109,7 @@ pub enum WaveformGenerationMode {
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impl WaveformGenerationMode {
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impl WaveformGenerationMode {
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/// Returns bits for TCCR1A, TCCR1B
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/// Returns bits for TCCR1A, TCCR1B
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#[inline]
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#[inline]
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fn bits<T: Timer16>(&self) -> (Mask<u8, T::ControlA>, Mask<u8, T::ControlB>) {
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fn bits<T: Timer16>(&self) -> (Mask<T::ControlA>, Mask<T::ControlB>) {
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use self::WaveformGenerationMode::*;
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use self::WaveformGenerationMode::*;
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// It makes more sense to return bytes (A,B), but the manual
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// It makes more sense to return bytes (A,B), but the manual
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@ -139,15 +139,15 @@ impl WaveformGenerationMode {
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}
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}
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#[inline]
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#[inline]
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fn mask<T: Timer16>() -> (Mask<u8, T::ControlA>, Mask<u8, T::ControlB>) {
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fn mask<T: Timer16>() -> (Mask<T::ControlA>, Mask<T::ControlB>) {
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(!(T::WGM0 | T::WGM1), !(T::WGM2 | T::WGM3))
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(!(T::WGM0 | T::WGM1), !(T::WGM2 | T::WGM3))
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}
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}
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}
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}
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pub struct Timer16Setup<T: Timer16> {
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pub struct Timer16Setup<T: Timer16> {
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a: Mask<u8, T::ControlA>,
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a: Mask<T::ControlA>,
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b: Mask<u8, T::ControlB>,
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b: Mask<T::ControlB>,
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c: Mask<u8, T::ControlC>,
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c: Mask<T::ControlC>,
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output_compare_1: Option<u16>,
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output_compare_1: Option<u16>,
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_phantom: marker::PhantomData<T>,
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_phantom: marker::PhantomData<T>,
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}
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}
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@ -2,49 +2,49 @@ use {Bitset, Mask, Register};
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use core::marker;
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use core::marker;
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/// A 8-bit timer.
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/// A 8-bit timer.
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pub trait Timer8 {
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pub trait Timer8 : Sized {
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/// The first compare register.
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/// The first compare register.
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/// For example, OCR0A.
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/// For example, OCR0A.
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type CompareA: Register<u8>;
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type CompareA: Register<T=u8>;
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/// The second compare register.
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/// The second compare register.
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/// For example, OCR0B.
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/// For example, OCR0B.
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type CompareB: Register<u8>;
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type CompareB: Register<T=u8>;
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/// The counter register.
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/// The counter register.
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///
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///
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/// For example, TCNT0.
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/// For example, TCNT0.
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type Counter: Register<u8>;
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type Counter: Register<T=u8>;
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/// The first control register.
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/// The first control register.
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///
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///
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/// For example, TCCR0A.
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/// For example, TCCR0A.
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type ControlA: Register<u8>;
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type ControlA: Register<T=u8>;
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/// The second control register.
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/// The second control register.
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///
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///
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/// For example, TCCR0B.
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/// For example, TCCR0B.
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type ControlB: Register<u8>;
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type ControlB: Register<T=u8>;
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/// The interrupt mask register.
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/// The interrupt mask register.
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///
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///
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/// For example, TIMSK0.
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/// For example, TIMSK0.
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type InterruptMask: Register<u8>;
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type InterruptMask: Register<T=u8>;
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/// The interrupt flag register.
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/// The interrupt flag register.
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///
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///
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/// For example, TIFR0.
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/// For example, TIFR0.
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type InterruptFlag: Register<u8>;
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type InterruptFlag: Register<T=u8>;
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const CS0: Mask<u8, Self::ControlB>;
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const CS0: Mask<Self::ControlB>;
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const CS1: Mask<u8, Self::ControlB>;
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const CS1: Mask<Self::ControlB>;
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const CS2: Mask<u8, Self::ControlB>;
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const CS2: Mask<Self::ControlB>;
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const WGM0: Mask<u8, Self::ControlA>;
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const WGM0: Mask<Self::ControlA>;
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const WGM1: Mask<u8, Self::ControlA>;
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const WGM1: Mask<Self::ControlA>;
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const WGM2: Mask<u8, Self::ControlB>;
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const WGM2: Mask<Self::ControlB>;
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const OCIEA: Bitset<u8, Self::InterruptMask>;
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const OCIEA: Bitset<Self::InterruptMask>;
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}
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}
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pub enum ClockSource {
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pub enum ClockSource {
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}
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}
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impl ClockSource {
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impl ClockSource {
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fn bits<T: Timer8>(&self) -> Mask<u8, T::ControlB> {
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fn bits<T: Timer8>(&self) -> Mask<T::ControlB> {
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use self::ClockSource::*;
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use self::ClockSource::*;
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match *self {
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match *self {
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}
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}
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#[inline]
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#[inline]
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fn mask<T: Timer8>() -> Mask<u8, T::ControlB> {
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fn mask<T: Timer8>() -> Mask<T::ControlB> {
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!(T::CS2 | T::CS1 | T::CS0)
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!(T::CS2 | T::CS1 | T::CS0)
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}
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}
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}
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}
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@ -92,7 +92,7 @@ pub enum WaveformGenerationMode {
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impl WaveformGenerationMode {
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impl WaveformGenerationMode {
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/// Returns bits for TCCR0A, TCCR0B
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/// Returns bits for TCCR0A, TCCR0B
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#[inline]
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#[inline]
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fn bits<T: Timer8>(&self) -> (Mask<u8, T::ControlA>, Mask<u8, T::ControlB>) {
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fn bits<T: Timer8>(&self) -> (Mask<T::ControlA>, Mask<T::ControlB>) {
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use self::WaveformGenerationMode::*;
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use self::WaveformGenerationMode::*;
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// It makes more sense to return bytes (A,B), but the manual
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// It makes more sense to return bytes (A,B), but the manual
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@ -114,14 +114,14 @@ impl WaveformGenerationMode {
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}
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}
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#[inline]
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#[inline]
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fn mask<T: Timer8>() -> (Mask<u8, T::ControlA>, Mask<u8, T::ControlB>) {
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fn mask<T: Timer8>() -> (Mask<T::ControlA>, Mask<T::ControlB>) {
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(!(T::WGM0 | T::WGM1), !(T::WGM2))
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(!(T::WGM0 | T::WGM1), !(T::WGM2))
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}
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}
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}
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}
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pub struct Timer8Setup<T: Timer8> {
|
pub struct Timer8Setup<T: Timer8> {
|
||||||
a: Mask<u8, T::ControlA>,
|
a: Mask<T::ControlA>,
|
||||||
b: Mask<u8, T::ControlB>,
|
b: Mask<T::ControlB>,
|
||||||
output_compare_1: Option<u8>,
|
output_compare_1: Option<u8>,
|
||||||
_phantom: marker::PhantomData<T>,
|
_phantom: marker::PhantomData<T>,
|
||||||
}
|
}
|
||||||
|
|
|
@ -2,13 +2,13 @@ use Register;
|
||||||
|
|
||||||
pub trait HardwareUsart {
|
pub trait HardwareUsart {
|
||||||
/// The USART data register.
|
/// The USART data register.
|
||||||
type DataRegister: Register<u8>;
|
type DataRegister: Register<T=u8>;
|
||||||
/// USART control and status register A.
|
/// USART control and status register A.
|
||||||
type ControlRegisterA: Register<u8>;
|
type ControlRegisterA: Register<T=u8>;
|
||||||
/// USART control and status register B.
|
/// USART control and status register B.
|
||||||
type ControlRegisterB: Register<u8>;
|
type ControlRegisterB: Register<T=u8>;
|
||||||
/// USART control and status register C.
|
/// USART control and status register C.
|
||||||
type ControlRegisterC: Register<u8>;
|
type ControlRegisterC: Register<T=u8>;
|
||||||
/// USART baud rate register.
|
/// USART baud rate register.
|
||||||
type BaudRateRegister: Register<u16>;
|
type BaudRateRegister: Register<T=u16>;
|
||||||
}
|
}
|
||||||
|
|
|
@ -3,14 +3,14 @@ use {DataDirection, Register};
|
||||||
/// An IO pin.
|
/// An IO pin.
|
||||||
pub trait Pin {
|
pub trait Pin {
|
||||||
/// The associated data direction register.
|
/// The associated data direction register.
|
||||||
type DDR: Register<u8>;
|
type DDR: Register<T=u8>;
|
||||||
/// The associated port register.
|
/// The associated port register.
|
||||||
type PORT: Register<u8>;
|
type PORT: Register<T=u8>;
|
||||||
/// The associated pin register.
|
/// The associated pin register.
|
||||||
///
|
///
|
||||||
/// Reads from the register will read input bits.
|
/// Reads from the register will read input bits.
|
||||||
/// Writes to the register will toggle bits.
|
/// Writes to the register will toggle bits.
|
||||||
type PIN: Register<u8>;
|
type PIN: Register<T=u8>;
|
||||||
/// The mask of the pin used for accessing registers.
|
/// The mask of the pin used for accessing registers.
|
||||||
const MASK: u8;
|
const MASK: u8;
|
||||||
|
|
||||||
|
|
|
@ -14,15 +14,16 @@ pub trait RegisterValue : Copy + Clone +
|
||||||
}
|
}
|
||||||
|
|
||||||
/// A register.
|
/// A register.
|
||||||
pub trait Register<T: RegisterValue> : Sized {
|
pub trait Register : Sized {
|
||||||
type Mask = Mask<T, Self>;
|
type T: RegisterValue;
|
||||||
|
type Mask = Mask<Self>;
|
||||||
|
|
||||||
/// The address of the register.
|
/// The address of the register.
|
||||||
const ADDR: *mut T;
|
const ADDR: *mut Self::T;
|
||||||
|
|
||||||
/// Writes a value to the register.
|
/// Writes a value to the register.
|
||||||
#[inline(always)]
|
#[inline(always)]
|
||||||
fn write<V>(value: V) where V: Into<T> {
|
fn write<V>(value: V) where V: Into<Self::T> {
|
||||||
unsafe {
|
unsafe {
|
||||||
*Self::ADDR = value.into();
|
*Self::ADDR = value.into();
|
||||||
}
|
}
|
||||||
|
@ -30,11 +31,11 @@ pub trait Register<T: RegisterValue> : Sized {
|
||||||
|
|
||||||
/// Reads the value of the register.
|
/// Reads the value of the register.
|
||||||
#[inline(always)]
|
#[inline(always)]
|
||||||
fn read() -> T {
|
fn read() -> Self::T {
|
||||||
unsafe { *Self::ADDR }
|
unsafe { *Self::ADDR }
|
||||||
}
|
}
|
||||||
|
|
||||||
fn set(mask: Mask<T, Self>) {
|
fn set(mask: Mask<Self>) {
|
||||||
Self::set_raw(mask.mask);
|
Self::set_raw(mask.mask);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -42,13 +43,13 @@ pub trait Register<T: RegisterValue> : Sized {
|
||||||
///
|
///
|
||||||
/// This is equivalent to `r |= mask`.
|
/// This is equivalent to `r |= mask`.
|
||||||
#[inline(always)]
|
#[inline(always)]
|
||||||
fn set_raw(mask: T) {
|
fn set_raw(mask: Self::T) {
|
||||||
unsafe {
|
unsafe {
|
||||||
*Self::ADDR |= mask;
|
*Self::ADDR |= mask;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
fn unset(mask: Mask<T, Self>) {
|
fn unset(mask: Mask<Self>) {
|
||||||
Self::unset_raw(mask.mask);
|
Self::unset_raw(mask.mask);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -56,13 +57,13 @@ pub trait Register<T: RegisterValue> : Sized {
|
||||||
///
|
///
|
||||||
/// This is equivalent to `r &= !mask`.
|
/// This is equivalent to `r &= !mask`.
|
||||||
#[inline(always)]
|
#[inline(always)]
|
||||||
fn unset_raw(mask: T) {
|
fn unset_raw(mask: Self::T) {
|
||||||
unsafe {
|
unsafe {
|
||||||
*Self::ADDR &= !mask;
|
*Self::ADDR &= !mask;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
fn toggle(mask: Mask<T, Self>) {
|
fn toggle(mask: Mask<Self>) {
|
||||||
Self::toggle_raw(mask.mask);
|
Self::toggle_raw(mask.mask);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -70,13 +71,13 @@ pub trait Register<T: RegisterValue> : Sized {
|
||||||
///
|
///
|
||||||
/// This is equivalent to `r ^= mask`.
|
/// This is equivalent to `r ^= mask`.
|
||||||
#[inline(always)]
|
#[inline(always)]
|
||||||
fn toggle_raw(mask: T) {
|
fn toggle_raw(mask: Self::T) {
|
||||||
unsafe {
|
unsafe {
|
||||||
*Self::ADDR ^= mask;
|
*Self::ADDR ^= mask;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
fn is_set(mask: Mask<T, Self>) -> bool {
|
fn is_set(mask: Mask<Self>) -> bool {
|
||||||
Self::is_set_raw(mask.mask)
|
Self::is_set_raw(mask.mask)
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -84,13 +85,13 @@ pub trait Register<T: RegisterValue> : Sized {
|
||||||
///
|
///
|
||||||
/// This is equivalent to `(r & mask) == mask`.
|
/// This is equivalent to `(r & mask) == mask`.
|
||||||
#[inline(always)]
|
#[inline(always)]
|
||||||
fn is_set_raw(mask: T) -> bool {
|
fn is_set_raw(mask: Self::T) -> bool {
|
||||||
unsafe {
|
unsafe {
|
||||||
(*Self::ADDR & mask) == mask
|
(*Self::ADDR & mask) == mask
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
fn is_clear(mask: Mask<T, Self>) -> bool {
|
fn is_clear(mask: Mask<Self>) -> bool {
|
||||||
Self::is_clear_raw(mask.mask)
|
Self::is_clear_raw(mask.mask)
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -98,9 +99,9 @@ pub trait Register<T: RegisterValue> : Sized {
|
||||||
///
|
///
|
||||||
/// This is equivalent to `(r & mask) == 0`.
|
/// This is equivalent to `(r & mask) == 0`.
|
||||||
#[inline(always)]
|
#[inline(always)]
|
||||||
fn is_clear_raw(mask: T) -> bool {
|
fn is_clear_raw(mask: Self::T) -> bool {
|
||||||
unsafe {
|
unsafe {
|
||||||
(*Self::ADDR & mask) == T::from(0)
|
(*Self::ADDR & mask) == Self::T::from(0)
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -115,35 +116,34 @@ pub trait Register<T: RegisterValue> : Sized {
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
fn wait_until_set(mask: Mask<T, Self>) {
|
fn wait_until_set(mask: Mask<Self>) {
|
||||||
Self::wait_until_set_raw(mask.mask);
|
Self::wait_until_set_raw(mask.mask);
|
||||||
}
|
}
|
||||||
|
|
||||||
/// Waits until a mask is set.
|
/// Waits until a mask is set.
|
||||||
#[inline(always)]
|
#[inline(always)]
|
||||||
fn wait_until_set_raw(mask: T) {
|
fn wait_until_set_raw(mask: Self::T) {
|
||||||
Self::wait_until(|| Self::is_set_raw(mask))
|
Self::wait_until(|| Self::is_set_raw(mask))
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
/// A register bitmask.
|
/// A register bitmask.
|
||||||
#[derive(Copy, Clone, Debug, PartialEq, Eq, PartialOrd, Ord, Hash)]
|
#[derive(Copy, Clone, Debug, PartialEq, Eq, PartialOrd, Ord, Hash)]
|
||||||
pub struct Bitset<T: RegisterValue, R: Register<T>> {
|
pub struct Bitset<R: Register> {
|
||||||
mask: T,
|
mask: R::T,
|
||||||
_phantom: marker::PhantomData<R>,
|
_phantom: marker::PhantomData<R>,
|
||||||
}
|
}
|
||||||
|
|
||||||
/// A register bitmask.
|
/// A register bitmask.
|
||||||
#[derive(Copy, Clone, Debug, PartialEq, Eq, PartialOrd, Ord, Hash)]
|
#[derive(Copy, Clone, Debug, PartialEq, Eq, PartialOrd, Ord, Hash)]
|
||||||
pub struct Mask<T: RegisterValue, R: Register<T>> {
|
pub struct Mask<R: Register> {
|
||||||
mask: T,
|
mask: R::T,
|
||||||
_phantom: marker::PhantomData<R>,
|
_phantom: marker::PhantomData<R>,
|
||||||
}
|
}
|
||||||
|
|
||||||
impl<T,R> Bitset<T,R>
|
impl<R> Bitset<R> where R: Register {
|
||||||
where T: RegisterValue, R: Register<T> {
|
|
||||||
/// Creates a new register mask.
|
/// Creates a new register mask.
|
||||||
pub const fn new(mask: T) -> Self {
|
pub const fn new(mask: R::T) -> Self {
|
||||||
Bitset { mask, _phantom: marker::PhantomData }
|
Bitset { mask, _phantom: marker::PhantomData }
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -176,10 +176,9 @@ impl<T,R> Bitset<T,R>
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
impl<T,R> Mask<T,R>
|
impl<R> Mask<R> where R: Register {
|
||||||
where T: RegisterValue, R: Register<T> {
|
|
||||||
/// Creates a new register mask.
|
/// Creates a new register mask.
|
||||||
pub const fn new(mask: T) -> Self {
|
pub const fn new(mask: R::T) -> Self {
|
||||||
Mask { mask, _phantom: marker::PhantomData }
|
Mask { mask, _phantom: marker::PhantomData }
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -188,8 +187,7 @@ impl<T,R> Mask<T,R>
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
impl<T,R> ops::BitOr for Mask<T,R>
|
impl<R> ops::BitOr for Mask<R> where R: Register
|
||||||
where T: RegisterValue, R: Register<T>
|
|
||||||
{
|
{
|
||||||
type Output = Self;
|
type Output = Self;
|
||||||
|
|
||||||
|
@ -198,15 +196,13 @@ impl<T,R> ops::BitOr for Mask<T,R>
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
impl<T,R> ops::BitOrAssign for Mask<T,R>
|
impl<R> ops::BitOrAssign for Mask<R> where R: Register {
|
||||||
where T: RegisterValue, R: Register<T> {
|
|
||||||
fn bitor_assign(&mut self, rhs: Self) {
|
fn bitor_assign(&mut self, rhs: Self) {
|
||||||
self.mask |= rhs.mask;
|
self.mask |= rhs.mask;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
impl<T,R> ops::BitAnd for Mask<T,R>
|
impl<R> ops::BitAnd for Mask<R> where R: Register
|
||||||
where T: RegisterValue, R: Register<T>
|
|
||||||
{
|
{
|
||||||
type Output = Self;
|
type Output = Self;
|
||||||
|
|
||||||
|
@ -215,15 +211,13 @@ impl<T,R> ops::BitAnd for Mask<T,R>
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
impl<T,R> ops::BitAndAssign for Mask<T,R>
|
impl<R> ops::BitAndAssign for Mask<R> where R: Register {
|
||||||
where T: RegisterValue, R: Register<T> {
|
|
||||||
fn bitand_assign(&mut self, rhs: Self) {
|
fn bitand_assign(&mut self, rhs: Self) {
|
||||||
self.mask &= rhs.mask;
|
self.mask &= rhs.mask;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
impl<T,R> ops::Not for Mask<T,R>
|
impl<R> ops::Not for Mask<R> where R: Register {
|
||||||
where T: RegisterValue, R: Register<T> {
|
|
||||||
type Output = Self;
|
type Output = Self;
|
||||||
|
|
||||||
fn not(self) -> Self {
|
fn not(self) -> Self {
|
||||||
|
@ -231,10 +225,12 @@ impl<T,R> ops::Not for Mask<T,R>
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
impl<R> Into<u8> for Mask<u8,R> where R: Register<u8> {
|
impl<R> Into<u8> for Mask<R> where R: Register<T=u8> {
|
||||||
fn into(self) -> u8 {
|
fn into(self) -> u8 { self.mask }
|
||||||
self.mask
|
}
|
||||||
}
|
|
||||||
|
impl<R> Into<u16> for Mask<R> where R: Register<T=u16> {
|
||||||
|
fn into(self) -> u16 { self.mask }
|
||||||
}
|
}
|
||||||
|
|
||||||
impl RegisterValue for u8 { }
|
impl RegisterValue for u8 { }
|
||||||
|
|
Loading…
Reference in New Issue