Compare commits

..

No commits in common. "bda8637c087cb81bc41c38b0ac4d016cde99c052" and "8235d34f954fd80aab126125410a64ec2ac7ee6c" have entirely different histories.

37 changed files with 225 additions and 21981 deletions

View File

@ -205,195 +205,180 @@ pub fn write_usarts(mcu: &Mcu, w: &mut dyn Write) -> Result<(), io::Error> {
} }
pub fn write_timers(mcu: &Mcu, w: &mut dyn Write) -> Result<(), io::Error> { pub fn write_timers(mcu: &Mcu, w: &mut dyn Write) -> Result<(), io::Error> {
let find_reg = |group: &RegisterGroup, name: &'static str| {
group
.registers
.iter()
.find(|r| r.name.starts_with(name))
.expect(&format!("could not find '{}' register", name))
.clone()
};
let find_reg_suffix_optional =
|group: &RegisterGroup, name: &'static str, suffix: &'static str| {
group
.registers
.iter()
.find(|r| r.name.starts_with(name) && r.name.ends_with(suffix))
.cloned()
};
let find_reg_suffix = |group: &RegisterGroup, name: &'static str, suffix: &'static str| {
find_reg_suffix_optional(group, name, suffix)
.expect(&format!("could not find '{} {}' register", name, suffix))
.clone()
};
if let Some(tc) = mcu.module("TC8") { if let Some(tc) = mcu.module("TC8") {
for group in tc.register_groups.iter() { // Timer/Counter, 8-bit.
let timer_number = group.name.chars().last().unwrap().to_digit(10).unwrap(); const TYPE_NAME: &'static str = "Timer8";
// Timer/Counter, 8-bit. let find_reg = |name: &'static str| {
const TYPE_NAME: &'static str = "Timer8"; tc.registers()
.find(|r| r.name.starts_with(name))
.expect(&format!("could not find '{}' register", name))
};
let find_reg_suffix_optional = |name: &'static str, suffix: &'static str| {
tc.registers()
.find(|r| r.name.starts_with(name) && r.name.ends_with(suffix))
};
let find_reg_suffix = |name: &'static str, suffix: &'static str| {
find_reg_suffix_optional(name, suffix)
.expect(&format!("could not find '{}' register", name))
};
let timer_number = find_reg("TIMSK")
.name
.chars()
.last()
.unwrap()
.to_digit(10)
.unwrap();
// TODO: At the moment, we do not support 8 bit timers that don't have two compare // TODO: At the moment, we do not support 8 bit timers that don't have two compare
// registers. // registers.
let should_skip_timer = find_reg_suffix_optional(&group, "OCR", "B").is_none(); let should_skip_timer = find_reg_suffix_optional("OCR", "B").is_none();
if !should_skip_timer { if !should_skip_timer {
writeln!(w, "/// 8-bit timer.")?; writeln!(w, "/// 8-bit timer.")?;
writeln!(w, "pub struct {};", TYPE_NAME)?;
writeln!(w)?;
writeln!(w, "impl modules::Timer8 for {} {{", TYPE_NAME)?;
writeln!(
w,
" type CompareA = {};",
find_reg_suffix(&group, "OCR", "A").name
)?;
writeln!(
w,
" type CompareB = {};",
find_reg_suffix(&group, "OCR", "B").name
)?;
writeln!(w, " type Counter = {};", find_reg(&group, "TCNT").name)?;
writeln!(
w,
" type ControlA = {};",
find_reg_suffix(&group, "TCCR", "A").name
)?;
writeln!(
w,
" type ControlB = {};",
find_reg_suffix(&group, "TCCR", "B").name
)?;
writeln!(
w,
" type InterruptMask = {};",
find_reg(&group, "TIMSK").name
)?;
writeln!(
w,
" type InterruptFlag = {};",
find_reg(&group, "TIFR").name
)?;
writeln!(
w,
" const CS0: RegisterBits<Self::ControlB> = Self::ControlB::CS00;"
)?;
writeln!(
w,
" const CS1: RegisterBits<Self::ControlB> = Self::ControlB::CS01;"
)?;
writeln!(
w,
" const CS2: RegisterBits<Self::ControlB> = Self::ControlB::CS02;"
)?;
writeln!(
w,
" const WGM0: RegisterBits<Self::ControlA> = Self::ControlA::WGM00;"
)?;
writeln!(
w,
" const WGM1: RegisterBits<Self::ControlA> = Self::ControlA::WGM01;"
)?;
writeln!(
w,
" const WGM2: RegisterBits<Self::ControlB> = Self::ControlB::WGM020;"
)?;
writeln!(w, " const OCIEA: RegisterBits<Self::InterruptMask> = Self::InterruptMask::OCIE{}A;", timer_number)?;
writeln!(w, "}}")?;
}
}
}
if let Some(tc) = mcu.module("TC16") {
for group in tc.register_groups.iter() {
let timer_number = group.name.chars().last().unwrap().to_digit(10).unwrap();
if find_reg_suffix_optional(&group, "TCCR", "A").is_none() {
// ATTiny85 has a TC16 group set in the data file, but there's no 16 bit timer
// documented in the datasheet. As such, I have no idea what to do about the three
// control registers and am simply going to bail instead of making assumptions.
println!("Only one control register found for 16-bit counter. Skipping.");
continue;
}
// Timer/Counter, 16-bit.
const TYPE_NAME: &'static str = "Timer16";
writeln!(w, "/// 16-bit timer.")?;
writeln!(w, "pub struct {};", TYPE_NAME)?; writeln!(w, "pub struct {};", TYPE_NAME)?;
writeln!(w)?; writeln!(w)?;
writeln!(w, "impl modules::Timer16 for {} {{", TYPE_NAME)?; writeln!(w, "impl modules::Timer8 for {} {{", TYPE_NAME)?;
writeln!( writeln!(
w, w,
" type CompareA = {};", " type CompareA = {};",
find_reg_suffix(&group, "OCR", "A").name find_reg_suffix("OCR", "A").name
)?; )?;
writeln!( writeln!(
w, w,
" type CompareB = {};", " type CompareB = {};",
find_reg_suffix(&group, "OCR", "B").name find_reg_suffix("OCR", "B").name
)?; )?;
writeln!(w, " type Counter = {};", find_reg(&group, "TCNT").name)?; writeln!(w, " type Counter = {};", find_reg("TCNT").name)?;
writeln!( writeln!(
w, w,
" type ControlA = {};", " type ControlA = {};",
find_reg_suffix(&group, "TCCR", "A").name find_reg_suffix("TCCR", "A").name
)?; )?;
writeln!( writeln!(
w, w,
" type ControlB = {};", " type ControlB = {};",
find_reg_suffix(&group, "TCCR", "B").name find_reg_suffix("TCCR", "B").name
)?;
writeln!(w, " type InterruptMask = {};", find_reg("TIMSK").name)?;
writeln!(w, " type InterruptFlag = {};", find_reg("TIFR").name)?;
writeln!(
w,
" const CS0: RegisterBits<Self::ControlB> = Self::ControlB::CS00;"
)?; )?;
writeln!( writeln!(
w, w,
" type ControlC = {};", " const CS1: RegisterBits<Self::ControlB> = Self::ControlB::CS01;"
find_reg_suffix(&group, "TCCR", "C").name
)?; )?;
writeln!( writeln!(
w, w,
" type InterruptMask = {};", " const CS2: RegisterBits<Self::ControlB> = Self::ControlB::CS02;"
find_reg(&group, "TIMSK").name
)?; )?;
writeln!( writeln!(
w, w,
" type InterruptFlag = {};", " const WGM0: RegisterBits<Self::ControlA> = Self::ControlA::WGM00;"
find_reg(&group, "TIFR").name
)?; )?;
writeln!( writeln!(
w, w,
" const CS0: RegisterBits<Self::ControlB> = Self::ControlB::CS10;" " const WGM1: RegisterBits<Self::ControlA> = Self::ControlA::WGM01;"
)?; )?;
writeln!( writeln!(
w, w,
" const CS1: RegisterBits<Self::ControlB> = Self::ControlB::CS11;" " const WGM2: RegisterBits<Self::ControlB> = Self::ControlB::WGM020;"
)?; )?;
writeln!( writeln!(w, " const OCIEA: RegisterBits<Self::InterruptMask> = Self::InterruptMask::OCIE{}A;", timer_number)?;
w, writeln!(w, "}}")?;
" const CS2: RegisterBits<Self::ControlB> = Self::ControlB::CS12;" }
)?; }
writeln!(
w, if let Some(tc) = mcu.module("TC16") {
" const WGM0: RegisterBits<Self::ControlA> = Self::ControlA::WGM10;" // Timer/Counter, 16-bit.
)?; const TYPE_NAME: &'static str = "Timer16";
writeln!(
w, let find_reg = |name: &'static str| {
" const WGM1: RegisterBits<Self::ControlA> = Self::ControlA::WGM11;" tc.registers()
)?; .find(|r| r.name.starts_with(name))
writeln!( .expect(&format!("could not find '{}' register", name))
w, };
" const WGM2: RegisterBits<Self::ControlB> = Self::ControlB::WGM10;" let find_reg_suffix = |name: &'static str, suffix: &'static str| {
)?; tc.registers()
writeln!( .find(|r| r.name.starts_with(name) && r.name.ends_with(suffix))
w, .expect(&format!("could not find '{}' register", name))
" const WGM3: RegisterBits<Self::ControlB> = Self::ControlB::WGM11;" };
)?; let timer_number = find_reg("TIMSK")
writeln!( .name
.chars()
.last()
.unwrap()
.to_digit(10)
.unwrap();
writeln!(w, "/// 16-bit timer.")?;
writeln!(w, "pub struct {};", TYPE_NAME)?;
writeln!(w)?;
writeln!(w, "impl modules::Timer16 for {} {{", TYPE_NAME)?;
writeln!(
w,
" type CompareA = {};",
find_reg_suffix("OCR", "A").name
)?;
writeln!(
w,
" type CompareB = {};",
find_reg_suffix("OCR", "B").name
)?;
writeln!(w, " type Counter = {};", find_reg("TCNT").name)?;
writeln!(
w,
" type ControlA = {};",
find_reg_suffix("TCCR", "A").name
)?;
writeln!(
w,
" type ControlB = {};",
find_reg_suffix("TCCR", "B").name
)?;
writeln!(
w,
" type ControlC = {};",
find_reg_suffix("TCCR", "C").name
)?;
writeln!(w, " type InterruptMask = {};", find_reg("TIMSK").name)?;
writeln!(w, " type InterruptFlag = {};", find_reg("TIFR").name)?;
writeln!(
w,
" const CS0: RegisterBits<Self::ControlB> = Self::ControlB::CS10;"
)?;
writeln!(
w,
" const CS1: RegisterBits<Self::ControlB> = Self::ControlB::CS11;"
)?;
writeln!(
w,
" const CS2: RegisterBits<Self::ControlB> = Self::ControlB::CS12;"
)?;
writeln!(
w,
" const WGM0: RegisterBits<Self::ControlA> = Self::ControlA::WGM10;"
)?;
writeln!(
w,
" const WGM1: RegisterBits<Self::ControlA> = Self::ControlA::WGM11;"
)?;
writeln!(
w,
" const WGM2: RegisterBits<Self::ControlB> = Self::ControlB::WGM10;"
)?;
writeln!(
w,
" const WGM3: RegisterBits<Self::ControlB> = Self::ControlB::WGM11;"
)?;
writeln!(
w, w,
" const OCIEA: RegisterBits<Self::InterruptMask> = Self::InterruptMask::OCIE{}A;", " const OCIEA: RegisterBits<Self::InterruptMask> = Self::InterruptMask::OCIE{}A;",
timer_number timer_number
)?; )?;
writeln!(w, "}}")?; writeln!(w, "}}")?;
}
} }
Ok(()) Ok(())

View File

@ -139,13 +139,8 @@ fn main() {
fs::create_dir_all(&cores_path()).expect("could not create cores directory"); fs::create_dir_all(&cores_path()).expect("could not create cores directory");
} }
let args: Vec<String> = std::env::args().collect(); // let microcontrollers = vec![avr_mcu::microcontroller("atmega32u4")];
println!("args: {:?}", args); let microcontrollers = avr_mcu::microcontrollers();
let microcontrollers = if args.len() > 2 {
vec![avr_mcu::microcontroller(args[2].as_ref())]
} else {
Vec::from(avr_mcu::microcontrollers())
};
let (count_total, mut cores_successful, mut cores_failed) = let (count_total, mut cores_successful, mut cores_failed) =
(microcontrollers.len(), Vec::new(), Vec::new()); (microcontrollers.len(), Vec::new(), Vec::new());

View File

@ -6,5 +6,5 @@ SCRIPT_DIR=$(dirname $0)
cd "${SCRIPT_DIR}/core_generator" cd "${SCRIPT_DIR}/core_generator"
cargo run -- ../src $1 cargo run "../src"

File diff suppressed because it is too large Load Diff

View File

@ -1791,10 +1791,10 @@ pub mod port {
pub struct Spi; pub struct Spi;
impl modules::HardwareSpi for Spi { impl modules::HardwareSpi for Spi {
type SerialDataOut = port::B3;
type ChipSelect = port::B2; type ChipSelect = port::B2;
type SerialDataIn = port::B4; type SerialDataIn = port::B4;
type Clock = port::B5; type Clock = port::B5;
type SerialDataOut = port::B3;
type DataRegister = SPDR; type DataRegister = SPDR;
type StatusRegister = SPSR; type StatusRegister = SPSR;
type ControlRegister = SPCR; type ControlRegister = SPCR;

View File

@ -1794,10 +1794,10 @@ pub mod port {
pub struct Spi; pub struct Spi;
impl modules::HardwareSpi for Spi { impl modules::HardwareSpi for Spi {
type Clock = port::B5;
type SerialDataIn = port::B4;
type SerialDataOut = port::B3; type SerialDataOut = port::B3;
type ChipSelect = port::B2; type ChipSelect = port::B2;
type Clock = port::B5;
type SerialDataIn = port::B4;
type DataRegister = SPDR; type DataRegister = SPDR;
type StatusRegister = SPSR; type StatusRegister = SPSR;
type ControlRegister = SPCR; type ControlRegister = SPCR;

View File

@ -1800,9 +1800,9 @@ pub mod port {
pub struct Spi; pub struct Spi;
impl modules::HardwareSpi for Spi { impl modules::HardwareSpi for Spi {
type ChipSelect = port::B2;
type SerialDataOut = port::B3; type SerialDataOut = port::B3;
type SerialDataIn = port::B4; type SerialDataIn = port::B4;
type ChipSelect = port::B2;
type Clock = port::B5; type Clock = port::B5;
type DataRegister = SPDR; type DataRegister = SPDR;
type StatusRegister = SPSR; type StatusRegister = SPSR;

View File

@ -3315,8 +3315,8 @@ pub struct Spi;
impl modules::HardwareSpi for Spi { impl modules::HardwareSpi for Spi {
type Clock = port::B1; type Clock = port::B1;
type ChipSelect = port::B0;
type SerialDataIn = port::B3; type SerialDataIn = port::B3;
type ChipSelect = port::B0;
type SerialDataOut = port::B2; type SerialDataOut = port::B2;
type ControlRegister = SPCR; type ControlRegister = SPCR;
type StatusRegister = SPSR; type StatusRegister = SPSR;
@ -3375,25 +3375,4 @@ impl modules::Timer16 for Timer16 {
const WGM3: RegisterBits<Self::ControlB> = Self::ControlB::WGM11; const WGM3: RegisterBits<Self::ControlB> = Self::ControlB::WGM11;
const OCIEA: RegisterBits<Self::InterruptMask> = Self::InterruptMask::OCIE3A; const OCIEA: RegisterBits<Self::InterruptMask> = Self::InterruptMask::OCIE3A;
} }
/// 16-bit timer.
pub struct Timer16;
impl modules::Timer16 for Timer16 {
type CompareA = OCR1A;
type CompareB = OCR1B;
type Counter = TCNT1;
type ControlA = TCCR1A;
type ControlB = TCCR1B;
type ControlC = TCCR1C;
type InterruptMask = TIMSK1;
type InterruptFlag = TIFR1;
const CS0: RegisterBits<Self::ControlB> = Self::ControlB::CS10;
const CS1: RegisterBits<Self::ControlB> = Self::ControlB::CS11;
const CS2: RegisterBits<Self::ControlB> = Self::ControlB::CS12;
const WGM0: RegisterBits<Self::ControlA> = Self::ControlA::WGM10;
const WGM1: RegisterBits<Self::ControlA> = Self::ControlA::WGM11;
const WGM2: RegisterBits<Self::ControlB> = Self::ControlB::WGM10;
const WGM3: RegisterBits<Self::ControlB> = Self::ControlB::WGM11;
const OCIEA: RegisterBits<Self::InterruptMask> = Self::InterruptMask::OCIE1A;
}

View File

@ -2040,10 +2040,10 @@ pub mod port {
pub struct Spi; pub struct Spi;
impl modules::HardwareSpi for Spi { impl modules::HardwareSpi for Spi {
type SerialDataIn = port::B4; type Clock = port::B5;
type SerialDataOut = port::B3; type SerialDataOut = port::B3;
type ChipSelect = port::B2; type ChipSelect = port::B2;
type Clock = port::B5; type SerialDataIn = port::B4;
type DataRegister = SPDR; type DataRegister = SPDR;
type StatusRegister = SPSR; type StatusRegister = SPSR;
type ControlRegister = SPCR; type ControlRegister = SPCR;

View File

@ -1802,8 +1802,8 @@ pub struct Spi;
impl modules::HardwareSpi for Spi { impl modules::HardwareSpi for Spi {
type ChipSelect = port::B2; type ChipSelect = port::B2;
type SerialDataOut = port::B3; type SerialDataOut = port::B3;
type SerialDataIn = port::B4;
type Clock = port::B5; type Clock = port::B5;
type SerialDataIn = port::B4;
type DataRegister = SPDR; type DataRegister = SPDR;
type StatusRegister = SPSR; type StatusRegister = SPSR;
type ControlRegister = SPCR; type ControlRegister = SPCR;

View File

@ -2960,8 +2960,8 @@ pub struct Spi;
impl modules::HardwareSpi for Spi { impl modules::HardwareSpi for Spi {
type SerialDataIn = port::B3; type SerialDataIn = port::B3;
type Clock = port::B1;
type SerialDataOut = port::B2; type SerialDataOut = port::B2;
type Clock = port::B1;
type ChipSelect = port::B0; type ChipSelect = port::B0;
type ControlRegister = SPCR; type ControlRegister = SPCR;
type StatusRegister = SPSR; type StatusRegister = SPSR;
@ -3020,25 +3020,4 @@ impl modules::Timer16 for Timer16 {
const WGM3: RegisterBits<Self::ControlB> = Self::ControlB::WGM11; const WGM3: RegisterBits<Self::ControlB> = Self::ControlB::WGM11;
const OCIEA: RegisterBits<Self::InterruptMask> = Self::InterruptMask::OCIE3A; const OCIEA: RegisterBits<Self::InterruptMask> = Self::InterruptMask::OCIE3A;
} }
/// 16-bit timer.
pub struct Timer16;
impl modules::Timer16 for Timer16 {
type CompareA = OCR1A;
type CompareB = OCR1B;
type Counter = TCNT1;
type ControlA = TCCR1A;
type ControlB = TCCR1B;
type ControlC = TCCR1C;
type InterruptMask = TIMSK1;
type InterruptFlag = TIFR1;
const CS0: RegisterBits<Self::ControlB> = Self::ControlB::CS10;
const CS1: RegisterBits<Self::ControlB> = Self::ControlB::CS11;
const CS2: RegisterBits<Self::ControlB> = Self::ControlB::CS12;
const WGM0: RegisterBits<Self::ControlA> = Self::ControlA::WGM10;
const WGM1: RegisterBits<Self::ControlA> = Self::ControlA::WGM11;
const WGM2: RegisterBits<Self::ControlB> = Self::ControlB::WGM10;
const WGM3: RegisterBits<Self::ControlB> = Self::ControlB::WGM11;
const OCIEA: RegisterBits<Self::InterruptMask> = Self::InterruptMask::OCIE1A;
}

File diff suppressed because it is too large Load Diff

View File

@ -1773,10 +1773,10 @@ pub mod port {
pub struct Spi; pub struct Spi;
impl modules::HardwareSpi for Spi { impl modules::HardwareSpi for Spi {
type SerialDataOut = port::B3;
type SerialDataIn = port::B4; type SerialDataIn = port::B4;
type ChipSelect = port::B2; type ChipSelect = port::B2;
type Clock = port::B5; type Clock = port::B5;
type SerialDataOut = port::B3;
type DataRegister = SPDR; type DataRegister = SPDR;
type StatusRegister = SPSR; type StatusRegister = SPSR;
type ControlRegister = SPCR; type ControlRegister = SPCR;

View File

@ -1798,10 +1798,10 @@ pub mod port {
pub struct Spi; pub struct Spi;
impl modules::HardwareSpi for Spi { impl modules::HardwareSpi for Spi {
type Clock = port::B5;
type ChipSelect = port::B2;
type SerialDataOut = port::B3; type SerialDataOut = port::B3;
type SerialDataIn = port::B4; type SerialDataIn = port::B4;
type ChipSelect = port::B2;
type Clock = port::B5;
type DataRegister = SPDR; type DataRegister = SPDR;
type StatusRegister = SPSR; type StatusRegister = SPSR;
type ControlRegister = SPCR; type ControlRegister = SPCR;

View File

@ -1779,8 +1779,8 @@ pub mod port {
pub struct Spi; pub struct Spi;
impl modules::HardwareSpi for Spi { impl modules::HardwareSpi for Spi {
type SerialDataIn = port::B4;
type ChipSelect = port::B2; type ChipSelect = port::B2;
type SerialDataIn = port::B4;
type Clock = port::B5; type Clock = port::B5;
type SerialDataOut = port::B3; type SerialDataOut = port::B3;
type DataRegister = SPDR; type DataRegister = SPDR;

View File

@ -1804,10 +1804,10 @@ pub mod port {
pub struct Spi; pub struct Spi;
impl modules::HardwareSpi for Spi { impl modules::HardwareSpi for Spi {
type ChipSelect = port::B2;
type Clock = port::B5;
type SerialDataIn = port::B4;
type SerialDataOut = port::B3; type SerialDataOut = port::B3;
type SerialDataIn = port::B4;
type Clock = port::B5;
type ChipSelect = port::B2;
type DataRegister = SPDR; type DataRegister = SPDR;
type StatusRegister = SPSR; type StatusRegister = SPSR;
type ControlRegister = SPCR; type ControlRegister = SPCR;

View File

@ -1791,10 +1791,10 @@ pub mod port {
pub struct Spi; pub struct Spi;
impl modules::HardwareSpi for Spi { impl modules::HardwareSpi for Spi {
type SerialDataIn = port::B4;
type Clock = port::B5;
type ChipSelect = port::B2; type ChipSelect = port::B2;
type SerialDataOut = port::B3; type SerialDataOut = port::B3;
type SerialDataIn = port::B4;
type Clock = port::B5;
type DataRegister = SPDR; type DataRegister = SPDR;
type StatusRegister = SPSR; type StatusRegister = SPSR;
type ControlRegister = SPCR; type ControlRegister = SPCR;

View File

@ -1794,10 +1794,10 @@ pub mod port {
pub struct Spi; pub struct Spi;
impl modules::HardwareSpi for Spi { impl modules::HardwareSpi for Spi {
type Clock = port::B5;
type SerialDataOut = port::B3; type SerialDataOut = port::B3;
type SerialDataIn = port::B4; type SerialDataIn = port::B4;
type ChipSelect = port::B2; type ChipSelect = port::B2;
type Clock = port::B5;
type DataRegister = SPDR; type DataRegister = SPDR;
type StatusRegister = SPSR; type StatusRegister = SPSR;
type ControlRegister = SPCR; type ControlRegister = SPCR;

View File

@ -1797,10 +1797,10 @@ pub mod port {
pub struct Spi; pub struct Spi;
impl modules::HardwareSpi for Spi { impl modules::HardwareSpi for Spi {
type Clock = port::B5;
type ChipSelect = port::B2; type ChipSelect = port::B2;
type SerialDataIn = port::B4; type Clock = port::B5;
type SerialDataOut = port::B3; type SerialDataOut = port::B3;
type SerialDataIn = port::B4;
type DataRegister = SPDR; type DataRegister = SPDR;
type StatusRegister = SPSR; type StatusRegister = SPSR;
type ControlRegister = SPCR; type ControlRegister = SPCR;

View File

@ -1800,10 +1800,10 @@ pub mod port {
pub struct Spi; pub struct Spi;
impl modules::HardwareSpi for Spi { impl modules::HardwareSpi for Spi {
type Clock = port::B5;
type ChipSelect = port::B2;
type SerialDataIn = port::B4;
type SerialDataOut = port::B3; type SerialDataOut = port::B3;
type SerialDataIn = port::B4;
type ChipSelect = port::B2;
type Clock = port::B5;
type DataRegister = SPDR; type DataRegister = SPDR;
type StatusRegister = SPSR; type StatusRegister = SPSR;
type ControlRegister = SPCR; type ControlRegister = SPCR;

View File

@ -1,282 +0,0 @@
//! Core for ATtiny11.
use crate::{modules, RegisterBits, Register};
#[allow(non_camel_case_types)]
pub struct LOW;
impl LOW {
pub const FSTRT: RegisterBits<Self> = RegisterBits::new(0x10);
pub const FSTRT0: RegisterBits<Self> = RegisterBits::new(1<<4);
pub const RSTDISBL: RegisterBits<Self> = RegisterBits::new(0x8);
pub const RSTDISBL0: RegisterBits<Self> = RegisterBits::new(1<<3);
pub const CKSEL: RegisterBits<Self> = RegisterBits::new(0x7);
pub const CKSEL0: RegisterBits<Self> = RegisterBits::new(1<<0);
pub const CKSEL1: RegisterBits<Self> = RegisterBits::new(1<<1);
pub const CKSEL2: RegisterBits<Self> = RegisterBits::new(1<<2);
}
impl Register for LOW {
type T = u8;
const ADDRESS: *mut u8 = 0x0 as *mut u8;
}
#[allow(non_camel_case_types)]
pub struct LOCKBIT;
impl LOCKBIT {
pub const LB: RegisterBits<Self> = RegisterBits::new(0x6);
pub const LB0: RegisterBits<Self> = RegisterBits::new(1<<1);
pub const LB1: RegisterBits<Self> = RegisterBits::new(1<<2);
}
impl Register for LOCKBIT {
type T = u8;
const ADDRESS: *mut u8 = 0x0 as *mut u8;
}
#[allow(non_camel_case_types)]
pub struct ACSR;
impl ACSR {
pub const ACD: RegisterBits<Self> = RegisterBits::new(0x80);
pub const ACD0: RegisterBits<Self> = RegisterBits::new(1<<7);
pub const ACO: RegisterBits<Self> = RegisterBits::new(0x20);
pub const ACO0: RegisterBits<Self> = RegisterBits::new(1<<5);
pub const ACI: RegisterBits<Self> = RegisterBits::new(0x10);
pub const ACI0: RegisterBits<Self> = RegisterBits::new(1<<4);
pub const ACIE: RegisterBits<Self> = RegisterBits::new(0x8);
pub const ACIE0: RegisterBits<Self> = RegisterBits::new(1<<3);
pub const ACIS: RegisterBits<Self> = RegisterBits::new(0x3);
pub const ACIS0: RegisterBits<Self> = RegisterBits::new(1<<0);
pub const ACIS1: RegisterBits<Self> = RegisterBits::new(1<<1);
}
impl Register for ACSR {
type T = u8;
const ADDRESS: *mut u8 = 0x8 as *mut u8;
}
#[allow(non_camel_case_types)]
pub struct GIMSK;
impl GIMSK {
pub const INT0: RegisterBits<Self> = RegisterBits::new(0x40);
pub const INT00: RegisterBits<Self> = RegisterBits::new(1<<6);
pub const PCIE: RegisterBits<Self> = RegisterBits::new(0x20);
pub const PCIE0: RegisterBits<Self> = RegisterBits::new(1<<5);
}
impl Register for GIMSK {
type T = u8;
const ADDRESS: *mut u8 = 0x3b as *mut u8;
}
#[allow(non_camel_case_types)]
pub struct GIFR;
impl GIFR {
pub const INTF0: RegisterBits<Self> = RegisterBits::new(0x40);
pub const INTF00: RegisterBits<Self> = RegisterBits::new(1<<6);
pub const PCIF: RegisterBits<Self> = RegisterBits::new(0x20);
pub const PCIF0: RegisterBits<Self> = RegisterBits::new(1<<5);
}
impl Register for GIFR {
type T = u8;
const ADDRESS: *mut u8 = 0x3a as *mut u8;
}
#[allow(non_camel_case_types)]
pub struct PORTB;
impl PORTB {
}
impl Register for PORTB {
type T = u8;
const ADDRESS: *mut u8 = 0x18 as *mut u8;
}
#[allow(non_camel_case_types)]
pub struct DDRB;
impl DDRB {
}
impl Register for DDRB {
type T = u8;
const ADDRESS: *mut u8 = 0x17 as *mut u8;
}
#[allow(non_camel_case_types)]
pub struct PINB;
impl PINB {
}
impl Register for PINB {
type T = u8;
const ADDRESS: *mut u8 = 0x16 as *mut u8;
}
#[allow(non_camel_case_types)]
pub struct TIMSK;
impl TIMSK {
pub const TOIE0: RegisterBits<Self> = RegisterBits::new(0x2);
pub const TOIE00: RegisterBits<Self> = RegisterBits::new(1<<1);
}
impl Register for TIMSK {
type T = u8;
const ADDRESS: *mut u8 = 0x39 as *mut u8;
}
#[allow(non_camel_case_types)]
pub struct TIFR;
impl TIFR {
pub const TOV0: RegisterBits<Self> = RegisterBits::new(0x2);
pub const TOV00: RegisterBits<Self> = RegisterBits::new(1<<1);
}
impl Register for TIFR {
type T = u8;
const ADDRESS: *mut u8 = 0x38 as *mut u8;
}
#[allow(non_camel_case_types)]
pub struct TCCR0;
impl TCCR0 {
pub const CS02: RegisterBits<Self> = RegisterBits::new(0x4);
pub const CS020: RegisterBits<Self> = RegisterBits::new(1<<2);
pub const CS01: RegisterBits<Self> = RegisterBits::new(0x2);
pub const CS010: RegisterBits<Self> = RegisterBits::new(1<<1);
pub const CS00: RegisterBits<Self> = RegisterBits::new(0x1);
pub const CS000: RegisterBits<Self> = RegisterBits::new(1<<0);
}
impl Register for TCCR0 {
type T = u8;
const ADDRESS: *mut u8 = 0x33 as *mut u8;
}
#[allow(non_camel_case_types)]
pub struct TCNT0;
impl TCNT0 {
}
impl Register for TCNT0 {
type T = u8;
const ADDRESS: *mut u8 = 0x32 as *mut u8;
}
#[allow(non_camel_case_types)]
pub struct WDTCR;
impl WDTCR {
pub const WDTOE: RegisterBits<Self> = RegisterBits::new(0x10);
pub const WDTOE0: RegisterBits<Self> = RegisterBits::new(1<<4);
pub const WDE: RegisterBits<Self> = RegisterBits::new(0x8);
pub const WDE0: RegisterBits<Self> = RegisterBits::new(1<<3);
pub const WDP: RegisterBits<Self> = RegisterBits::new(0x7);
pub const WDP0: RegisterBits<Self> = RegisterBits::new(1<<0);
pub const WDP1: RegisterBits<Self> = RegisterBits::new(1<<1);
pub const WDP2: RegisterBits<Self> = RegisterBits::new(1<<2);
}
impl Register for WDTCR {
type T = u8;
const ADDRESS: *mut u8 = 0x21 as *mut u8;
}
#[allow(non_camel_case_types)]
pub struct SREG;
impl SREG {
pub const I: RegisterBits<Self> = RegisterBits::new(0x80);
pub const I0: RegisterBits<Self> = RegisterBits::new(1<<7);
pub const T: RegisterBits<Self> = RegisterBits::new(0x40);
pub const T0: RegisterBits<Self> = RegisterBits::new(1<<6);
pub const H: RegisterBits<Self> = RegisterBits::new(0x20);
pub const H0: RegisterBits<Self> = RegisterBits::new(1<<5);
pub const S: RegisterBits<Self> = RegisterBits::new(0x10);
pub const S0: RegisterBits<Self> = RegisterBits::new(1<<4);
pub const V: RegisterBits<Self> = RegisterBits::new(0x8);
pub const V0: RegisterBits<Self> = RegisterBits::new(1<<3);
pub const N: RegisterBits<Self> = RegisterBits::new(0x4);
pub const N0: RegisterBits<Self> = RegisterBits::new(1<<2);
pub const Z: RegisterBits<Self> = RegisterBits::new(0x2);
pub const Z0: RegisterBits<Self> = RegisterBits::new(1<<1);
pub const C: RegisterBits<Self> = RegisterBits::new(0x1);
pub const C0: RegisterBits<Self> = RegisterBits::new(1<<0);
}
impl Register for SREG {
type T = u8;
const ADDRESS: *mut u8 = 0x3f as *mut u8;
}
#[allow(non_camel_case_types)]
pub struct MCUSR;
impl MCUSR {
pub const EXTRF: RegisterBits<Self> = RegisterBits::new(0x2);
pub const EXTRF0: RegisterBits<Self> = RegisterBits::new(1<<1);
pub const PORF: RegisterBits<Self> = RegisterBits::new(0x1);
pub const PORF0: RegisterBits<Self> = RegisterBits::new(1<<0);
}
impl Register for MCUSR {
type T = u8;
const ADDRESS: *mut u8 = 0x34 as *mut u8;
}
#[allow(non_camel_case_types)]
pub struct MCUCR;
impl MCUCR {
pub const SE: RegisterBits<Self> = RegisterBits::new(0x20);
pub const SE0: RegisterBits<Self> = RegisterBits::new(1<<5);
pub const SM: RegisterBits<Self> = RegisterBits::new(0x10);
pub const SM0: RegisterBits<Self> = RegisterBits::new(1<<4);
pub const ISC0: RegisterBits<Self> = RegisterBits::new(0x3);
pub const ISC00: RegisterBits<Self> = RegisterBits::new(1<<0);
pub const ISC01: RegisterBits<Self> = RegisterBits::new(1<<1);
}
impl Register for MCUCR {
type T = u8;
const ADDRESS: *mut u8 = 0x35 as *mut u8;
}
pub mod port {
#![allow(unused_imports)]
use super::*;
use crate::Pin;
}

View File

@ -1,363 +0,0 @@
//! Core for ATtiny12.
use crate::{modules, RegisterBits, Register};
#[allow(non_camel_case_types)]
pub struct LOW;
impl LOW {
pub const BODLEVEL: RegisterBits<Self> = RegisterBits::new(0x80);
pub const BODLEVEL0: RegisterBits<Self> = RegisterBits::new(1<<7);
pub const BODEN: RegisterBits<Self> = RegisterBits::new(0x40);
pub const BODEN0: RegisterBits<Self> = RegisterBits::new(1<<6);
pub const SPIEN: RegisterBits<Self> = RegisterBits::new(0x20);
pub const SPIEN0: RegisterBits<Self> = RegisterBits::new(1<<5);
pub const RSTDISBL: RegisterBits<Self> = RegisterBits::new(0x10);
pub const RSTDISBL0: RegisterBits<Self> = RegisterBits::new(1<<4);
pub const CKSEL: RegisterBits<Self> = RegisterBits::new(0xf);
pub const CKSEL0: RegisterBits<Self> = RegisterBits::new(1<<0);
pub const CKSEL1: RegisterBits<Self> = RegisterBits::new(1<<1);
pub const CKSEL2: RegisterBits<Self> = RegisterBits::new(1<<2);
pub const CKSEL3: RegisterBits<Self> = RegisterBits::new(1<<3);
}
impl Register for LOW {
type T = u8;
const ADDRESS: *mut u8 = 0x0 as *mut u8;
}
#[allow(non_camel_case_types)]
pub struct LOCKBIT;
impl LOCKBIT {
pub const LB: RegisterBits<Self> = RegisterBits::new(0x6);
pub const LB0: RegisterBits<Self> = RegisterBits::new(1<<1);
pub const LB1: RegisterBits<Self> = RegisterBits::new(1<<2);
}
impl Register for LOCKBIT {
type T = u8;
const ADDRESS: *mut u8 = 0x0 as *mut u8;
}
#[allow(non_camel_case_types)]
pub struct ACSR;
impl ACSR {
pub const ACD: RegisterBits<Self> = RegisterBits::new(0x80);
pub const ACD0: RegisterBits<Self> = RegisterBits::new(1<<7);
pub const AINBG: RegisterBits<Self> = RegisterBits::new(0x40);
pub const AINBG0: RegisterBits<Self> = RegisterBits::new(1<<6);
pub const ACO: RegisterBits<Self> = RegisterBits::new(0x20);
pub const ACO0: RegisterBits<Self> = RegisterBits::new(1<<5);
pub const ACI: RegisterBits<Self> = RegisterBits::new(0x10);
pub const ACI0: RegisterBits<Self> = RegisterBits::new(1<<4);
pub const ACIE: RegisterBits<Self> = RegisterBits::new(0x8);
pub const ACIE0: RegisterBits<Self> = RegisterBits::new(1<<3);
pub const ACIS: RegisterBits<Self> = RegisterBits::new(0x3);
pub const ACIS0: RegisterBits<Self> = RegisterBits::new(1<<0);
pub const ACIS1: RegisterBits<Self> = RegisterBits::new(1<<1);
}
impl Register for ACSR {
type T = u8;
const ADDRESS: *mut u8 = 0x8 as *mut u8;
}
#[allow(non_camel_case_types)]
pub struct SREG;
impl SREG {
pub const I: RegisterBits<Self> = RegisterBits::new(0x80);
pub const I0: RegisterBits<Self> = RegisterBits::new(1<<7);
pub const T: RegisterBits<Self> = RegisterBits::new(0x40);
pub const T0: RegisterBits<Self> = RegisterBits::new(1<<6);
pub const H: RegisterBits<Self> = RegisterBits::new(0x20);
pub const H0: RegisterBits<Self> = RegisterBits::new(1<<5);
pub const S: RegisterBits<Self> = RegisterBits::new(0x10);
pub const S0: RegisterBits<Self> = RegisterBits::new(1<<4);
pub const V: RegisterBits<Self> = RegisterBits::new(0x8);
pub const V0: RegisterBits<Self> = RegisterBits::new(1<<3);
pub const N: RegisterBits<Self> = RegisterBits::new(0x4);
pub const N0: RegisterBits<Self> = RegisterBits::new(1<<2);
pub const Z: RegisterBits<Self> = RegisterBits::new(0x2);
pub const Z0: RegisterBits<Self> = RegisterBits::new(1<<1);
pub const C: RegisterBits<Self> = RegisterBits::new(0x1);
pub const C0: RegisterBits<Self> = RegisterBits::new(1<<0);
}
impl Register for SREG {
type T = u8;
const ADDRESS: *mut u8 = 0x3f as *mut u8;
}
#[allow(non_camel_case_types)]
pub struct MCUCR;
impl MCUCR {
pub const PUD: RegisterBits<Self> = RegisterBits::new(0x40);
pub const PUD0: RegisterBits<Self> = RegisterBits::new(1<<6);
pub const SE: RegisterBits<Self> = RegisterBits::new(0x20);
pub const SE0: RegisterBits<Self> = RegisterBits::new(1<<5);
pub const SM: RegisterBits<Self> = RegisterBits::new(0x10);
pub const SM0: RegisterBits<Self> = RegisterBits::new(1<<4);
pub const ISC0: RegisterBits<Self> = RegisterBits::new(0x3);
pub const ISC00: RegisterBits<Self> = RegisterBits::new(1<<0);
pub const ISC01: RegisterBits<Self> = RegisterBits::new(1<<1);
}
impl Register for MCUCR {
type T = u8;
const ADDRESS: *mut u8 = 0x35 as *mut u8;
}
#[allow(non_camel_case_types)]
pub struct MCUSR;
impl MCUSR {
pub const WDRF: RegisterBits<Self> = RegisterBits::new(0x8);
pub const WDRF0: RegisterBits<Self> = RegisterBits::new(1<<3);
pub const BORF: RegisterBits<Self> = RegisterBits::new(0x4);
pub const BORF0: RegisterBits<Self> = RegisterBits::new(1<<2);
pub const EXTRF: RegisterBits<Self> = RegisterBits::new(0x2);
pub const EXTRF0: RegisterBits<Self> = RegisterBits::new(1<<1);
pub const PORF: RegisterBits<Self> = RegisterBits::new(0x1);
pub const PORF0: RegisterBits<Self> = RegisterBits::new(1<<0);
}
impl Register for MCUSR {
type T = u8;
const ADDRESS: *mut u8 = 0x34 as *mut u8;
}
#[allow(non_camel_case_types)]
pub struct OSCCAL;
impl OSCCAL {
pub const OSCCAL: RegisterBits<Self> = RegisterBits::new(0xff);
pub const OSCCAL0: RegisterBits<Self> = RegisterBits::new(1<<0);
pub const OSCCAL1: RegisterBits<Self> = RegisterBits::new(1<<1);
pub const OSCCAL2: RegisterBits<Self> = RegisterBits::new(1<<2);
pub const OSCCAL3: RegisterBits<Self> = RegisterBits::new(1<<3);
pub const OSCCAL4: RegisterBits<Self> = RegisterBits::new(1<<4);
pub const OSCCAL5: RegisterBits<Self> = RegisterBits::new(1<<5);
pub const OSCCAL6: RegisterBits<Self> = RegisterBits::new(1<<6);
pub const OSCCAL7: RegisterBits<Self> = RegisterBits::new(1<<7);
}
impl Register for OSCCAL {
type T = u8;
const ADDRESS: *mut u8 = 0x31 as *mut u8;
}
#[allow(non_camel_case_types)]
pub struct GIMSK;
impl GIMSK {
pub const INT0: RegisterBits<Self> = RegisterBits::new(0x40);
pub const INT00: RegisterBits<Self> = RegisterBits::new(1<<6);
pub const PCIE: RegisterBits<Self> = RegisterBits::new(0x20);
pub const PCIE0: RegisterBits<Self> = RegisterBits::new(1<<5);
}
impl Register for GIMSK {
type T = u8;
const ADDRESS: *mut u8 = 0x3b as *mut u8;
}
#[allow(non_camel_case_types)]
pub struct GIFR;
impl GIFR {
pub const INTF0: RegisterBits<Self> = RegisterBits::new(0x40);
pub const INTF00: RegisterBits<Self> = RegisterBits::new(1<<6);
pub const PCIF: RegisterBits<Self> = RegisterBits::new(0x20);
pub const PCIF0: RegisterBits<Self> = RegisterBits::new(1<<5);
}
impl Register for GIFR {
type T = u8;
const ADDRESS: *mut u8 = 0x3a as *mut u8;
}
#[allow(non_camel_case_types)]
pub struct EEAR;
impl EEAR {
}
impl Register for EEAR {
type T = u8;
const ADDRESS: *mut u8 = 0x1e as *mut u8;
}
#[allow(non_camel_case_types)]
pub struct EEDR;
impl EEDR {
}
impl Register for EEDR {
type T = u8;
const ADDRESS: *mut u8 = 0x1d as *mut u8;
}
#[allow(non_camel_case_types)]
pub struct EECR;
impl EECR {
pub const EERIE: RegisterBits<Self> = RegisterBits::new(0x8);
pub const EERIE0: RegisterBits<Self> = RegisterBits::new(1<<3);
pub const EEMWE: RegisterBits<Self> = RegisterBits::new(0x4);
pub const EEMWE0: RegisterBits<Self> = RegisterBits::new(1<<2);
pub const EEWE: RegisterBits<Self> = RegisterBits::new(0x2);
pub const EEWE0: RegisterBits<Self> = RegisterBits::new(1<<1);
pub const EERE: RegisterBits<Self> = RegisterBits::new(0x1);
pub const EERE0: RegisterBits<Self> = RegisterBits::new(1<<0);
}
impl Register for EECR {
type T = u8;
const ADDRESS: *mut u8 = 0x1c as *mut u8;
}
#[allow(non_camel_case_types)]
pub struct PORTB;
impl PORTB {
}
impl Register for PORTB {
type T = u8;
const ADDRESS: *mut u8 = 0x18 as *mut u8;
}
#[allow(non_camel_case_types)]
pub struct DDRB;
impl DDRB {
}
impl Register for DDRB {
type T = u8;
const ADDRESS: *mut u8 = 0x17 as *mut u8;
}
#[allow(non_camel_case_types)]
pub struct PINB;
impl PINB {
}
impl Register for PINB {
type T = u8;
const ADDRESS: *mut u8 = 0x16 as *mut u8;
}
#[allow(non_camel_case_types)]
pub struct TIMSK;
impl TIMSK {
pub const TOIE0: RegisterBits<Self> = RegisterBits::new(0x2);
pub const TOIE00: RegisterBits<Self> = RegisterBits::new(1<<1);
}
impl Register for TIMSK {
type T = u8;
const ADDRESS: *mut u8 = 0x39 as *mut u8;
}
#[allow(non_camel_case_types)]
pub struct TIFR;
impl TIFR {
pub const TOV0: RegisterBits<Self> = RegisterBits::new(0x2);
pub const TOV00: RegisterBits<Self> = RegisterBits::new(1<<1);
}
impl Register for TIFR {
type T = u8;
const ADDRESS: *mut u8 = 0x38 as *mut u8;
}
#[allow(non_camel_case_types)]
pub struct TCCR0;
impl TCCR0 {
pub const CS02: RegisterBits<Self> = RegisterBits::new(0x4);
pub const CS020: RegisterBits<Self> = RegisterBits::new(1<<2);
pub const CS01: RegisterBits<Self> = RegisterBits::new(0x2);
pub const CS010: RegisterBits<Self> = RegisterBits::new(1<<1);
pub const CS00: RegisterBits<Self> = RegisterBits::new(0x1);
pub const CS000: RegisterBits<Self> = RegisterBits::new(1<<0);
}
impl Register for TCCR0 {
type T = u8;
const ADDRESS: *mut u8 = 0x33 as *mut u8;
}
#[allow(non_camel_case_types)]
pub struct TCNT0;
impl TCNT0 {
}
impl Register for TCNT0 {
type T = u8;
const ADDRESS: *mut u8 = 0x32 as *mut u8;
}
#[allow(non_camel_case_types)]
pub struct WDTCR;
impl WDTCR {
pub const WDTOE: RegisterBits<Self> = RegisterBits::new(0x10);
pub const WDTOE0: RegisterBits<Self> = RegisterBits::new(1<<4);
pub const WDE: RegisterBits<Self> = RegisterBits::new(0x8);
pub const WDE0: RegisterBits<Self> = RegisterBits::new(1<<3);
pub const WDP: RegisterBits<Self> = RegisterBits::new(0x7);
pub const WDP0: RegisterBits<Self> = RegisterBits::new(1<<0);
pub const WDP1: RegisterBits<Self> = RegisterBits::new(1<<1);
pub const WDP2: RegisterBits<Self> = RegisterBits::new(1<<2);
}
impl Register for WDTCR {
type T = u8;
const ADDRESS: *mut u8 = 0x21 as *mut u8;
}
pub mod port {
#![allow(unused_imports)]
use super::*;
use crate::Pin;
}

File diff suppressed because it is too large Load Diff

File diff suppressed because it is too large Load Diff

File diff suppressed because it is too large Load Diff

File diff suppressed because it is too large Load Diff

View File

@ -1,726 +0,0 @@
//! Core for ATtiny26.
use crate::{modules, RegisterBits, Register};
#[allow(non_camel_case_types)]
pub struct HIGH;
impl HIGH {
pub const RSTDISBL: RegisterBits<Self> = RegisterBits::new(0x10);
pub const RSTDISBL0: RegisterBits<Self> = RegisterBits::new(1<<4);
pub const SPIEN: RegisterBits<Self> = RegisterBits::new(0x8);
pub const SPIEN0: RegisterBits<Self> = RegisterBits::new(1<<3);
pub const EESAVE: RegisterBits<Self> = RegisterBits::new(0x4);
pub const EESAVE0: RegisterBits<Self> = RegisterBits::new(1<<2);
pub const BODLEVEL: RegisterBits<Self> = RegisterBits::new(0x2);
pub const BODLEVEL0: RegisterBits<Self> = RegisterBits::new(1<<1);
pub const BODEN: RegisterBits<Self> = RegisterBits::new(0x1);
pub const BODEN0: RegisterBits<Self> = RegisterBits::new(1<<0);
}
impl Register for HIGH {
type T = u8;
const ADDRESS: *mut u8 = 0x1 as *mut u8;
}
#[allow(non_camel_case_types)]
pub struct LOW;
impl LOW {
pub const CKOPT: RegisterBits<Self> = RegisterBits::new(0x40);
pub const CKOPT0: RegisterBits<Self> = RegisterBits::new(1<<6);
pub const PLLCK_SUT_CKSEL: RegisterBits<Self> = RegisterBits::new(0xbf);
pub const PLLCK_SUT_CKSEL0: RegisterBits<Self> = RegisterBits::new(1<<0);
pub const PLLCK_SUT_CKSEL1: RegisterBits<Self> = RegisterBits::new(1<<1);
pub const PLLCK_SUT_CKSEL2: RegisterBits<Self> = RegisterBits::new(1<<2);
pub const PLLCK_SUT_CKSEL3: RegisterBits<Self> = RegisterBits::new(1<<3);
pub const PLLCK_SUT_CKSEL4: RegisterBits<Self> = RegisterBits::new(1<<4);
pub const PLLCK_SUT_CKSEL5: RegisterBits<Self> = RegisterBits::new(1<<5);
pub const PLLCK_SUT_CKSEL6: RegisterBits<Self> = RegisterBits::new(1<<7);
}
impl Register for LOW {
type T = u8;
const ADDRESS: *mut u8 = 0x0 as *mut u8;
}
#[allow(non_camel_case_types)]
pub struct LOCKBIT;
impl LOCKBIT {
pub const LB: RegisterBits<Self> = RegisterBits::new(0x3);
pub const LB0: RegisterBits<Self> = RegisterBits::new(1<<0);
pub const LB1: RegisterBits<Self> = RegisterBits::new(1<<1);
}
impl Register for LOCKBIT {
type T = u8;
const ADDRESS: *mut u8 = 0x0 as *mut u8;
}
#[allow(non_camel_case_types)]
pub struct ADMUX;
impl ADMUX {
pub const REFS: RegisterBits<Self> = RegisterBits::new(0xc0);
pub const REFS0: RegisterBits<Self> = RegisterBits::new(1<<6);
pub const REFS1: RegisterBits<Self> = RegisterBits::new(1<<7);
pub const ADLAR: RegisterBits<Self> = RegisterBits::new(0x20);
pub const ADLAR0: RegisterBits<Self> = RegisterBits::new(1<<5);
pub const MUX: RegisterBits<Self> = RegisterBits::new(0x1f);
pub const MUX0: RegisterBits<Self> = RegisterBits::new(1<<0);
pub const MUX1: RegisterBits<Self> = RegisterBits::new(1<<1);
pub const MUX2: RegisterBits<Self> = RegisterBits::new(1<<2);
pub const MUX3: RegisterBits<Self> = RegisterBits::new(1<<3);
pub const MUX4: RegisterBits<Self> = RegisterBits::new(1<<4);
}
impl Register for ADMUX {
type T = u8;
const ADDRESS: *mut u8 = 0x27 as *mut u8;
}
#[allow(non_camel_case_types)]
pub struct ADCSR;
impl ADCSR {
pub const ADEN: RegisterBits<Self> = RegisterBits::new(0x80);
pub const ADEN0: RegisterBits<Self> = RegisterBits::new(1<<7);
pub const ADSC: RegisterBits<Self> = RegisterBits::new(0x40);
pub const ADSC0: RegisterBits<Self> = RegisterBits::new(1<<6);
pub const ADFR: RegisterBits<Self> = RegisterBits::new(0x20);
pub const ADFR0: RegisterBits<Self> = RegisterBits::new(1<<5);
pub const ADIF: RegisterBits<Self> = RegisterBits::new(0x10);
pub const ADIF0: RegisterBits<Self> = RegisterBits::new(1<<4);
pub const ADIE: RegisterBits<Self> = RegisterBits::new(0x8);
pub const ADIE0: RegisterBits<Self> = RegisterBits::new(1<<3);
pub const ADPS: RegisterBits<Self> = RegisterBits::new(0x7);
pub const ADPS0: RegisterBits<Self> = RegisterBits::new(1<<0);
pub const ADPS1: RegisterBits<Self> = RegisterBits::new(1<<1);
pub const ADPS2: RegisterBits<Self> = RegisterBits::new(1<<2);
}
impl Register for ADCSR {
type T = u8;
const ADDRESS: *mut u8 = 0x26 as *mut u8;
}
#[allow(non_camel_case_types)]
pub struct ADC;
impl ADC {
}
impl Register for ADC {
type T = u16;
const ADDRESS: *mut u16 = 0x24 as *mut u16;
}
#[allow(non_camel_case_types)]
pub struct ACSR;
impl ACSR {
pub const ACD: RegisterBits<Self> = RegisterBits::new(0x80);
pub const ACD0: RegisterBits<Self> = RegisterBits::new(1<<7);
pub const ACBG: RegisterBits<Self> = RegisterBits::new(0x40);
pub const ACBG0: RegisterBits<Self> = RegisterBits::new(1<<6);
pub const ACO: RegisterBits<Self> = RegisterBits::new(0x20);
pub const ACO0: RegisterBits<Self> = RegisterBits::new(1<<5);
pub const ACI: RegisterBits<Self> = RegisterBits::new(0x10);
pub const ACI0: RegisterBits<Self> = RegisterBits::new(1<<4);
pub const ACIE: RegisterBits<Self> = RegisterBits::new(0x8);
pub const ACIE0: RegisterBits<Self> = RegisterBits::new(1<<3);
pub const ACME: RegisterBits<Self> = RegisterBits::new(0x4);
pub const ACME0: RegisterBits<Self> = RegisterBits::new(1<<2);
pub const ACIS: RegisterBits<Self> = RegisterBits::new(0x3);
pub const ACIS0: RegisterBits<Self> = RegisterBits::new(1<<0);
pub const ACIS1: RegisterBits<Self> = RegisterBits::new(1<<1);
}
impl Register for ACSR {
type T = u8;
const ADDRESS: *mut u8 = 0x28 as *mut u8;
}
#[allow(non_camel_case_types)]
pub struct USIDR;
impl USIDR {
}
impl Register for USIDR {
type T = u8;
const ADDRESS: *mut u8 = 0x2f as *mut u8;
}
#[allow(non_camel_case_types)]
pub struct USISR;
impl USISR {
pub const USISIF: RegisterBits<Self> = RegisterBits::new(0x80);
pub const USISIF0: RegisterBits<Self> = RegisterBits::new(1<<7);
pub const USIOIF: RegisterBits<Self> = RegisterBits::new(0x40);
pub const USIOIF0: RegisterBits<Self> = RegisterBits::new(1<<6);
pub const USIPF: RegisterBits<Self> = RegisterBits::new(0x20);
pub const USIPF0: RegisterBits<Self> = RegisterBits::new(1<<5);
pub const USIDC: RegisterBits<Self> = RegisterBits::new(0x10);
pub const USIDC0: RegisterBits<Self> = RegisterBits::new(1<<4);
pub const USICNT: RegisterBits<Self> = RegisterBits::new(0xf);
pub const USICNT0: RegisterBits<Self> = RegisterBits::new(1<<0);
pub const USICNT1: RegisterBits<Self> = RegisterBits::new(1<<1);
pub const USICNT2: RegisterBits<Self> = RegisterBits::new(1<<2);
pub const USICNT3: RegisterBits<Self> = RegisterBits::new(1<<3);
}
impl Register for USISR {
type T = u8;
const ADDRESS: *mut u8 = 0x2e as *mut u8;
}
#[allow(non_camel_case_types)]
pub struct USICR;
impl USICR {
pub const USISIE: RegisterBits<Self> = RegisterBits::new(0x80);
pub const USISIE0: RegisterBits<Self> = RegisterBits::new(1<<7);
pub const USIOIE: RegisterBits<Self> = RegisterBits::new(0x40);
pub const USIOIE0: RegisterBits<Self> = RegisterBits::new(1<<6);
pub const USIWM: RegisterBits<Self> = RegisterBits::new(0x30);
pub const USIWM0: RegisterBits<Self> = RegisterBits::new(1<<4);
pub const USIWM1: RegisterBits<Self> = RegisterBits::new(1<<5);
pub const USICS: RegisterBits<Self> = RegisterBits::new(0xc);
pub const USICS0: RegisterBits<Self> = RegisterBits::new(1<<2);
pub const USICS1: RegisterBits<Self> = RegisterBits::new(1<<3);
pub const USICLK: RegisterBits<Self> = RegisterBits::new(0x2);
pub const USICLK0: RegisterBits<Self> = RegisterBits::new(1<<1);
pub const USITC: RegisterBits<Self> = RegisterBits::new(0x1);
pub const USITC0: RegisterBits<Self> = RegisterBits::new(1<<0);
}
impl Register for USICR {
type T = u8;
const ADDRESS: *mut u8 = 0x2d as *mut u8;
}
#[allow(non_camel_case_types)]
pub struct PORTA;
impl PORTA {
}
impl Register for PORTA {
type T = u8;
const ADDRESS: *mut u8 = 0x3b as *mut u8;
}
#[allow(non_camel_case_types)]
pub struct DDRA;
impl DDRA {
}
impl Register for DDRA {
type T = u8;
const ADDRESS: *mut u8 = 0x3a as *mut u8;
}
#[allow(non_camel_case_types)]
pub struct PINA;
impl PINA {
}
impl Register for PINA {
type T = u8;
const ADDRESS: *mut u8 = 0x39 as *mut u8;
}
#[allow(non_camel_case_types)]
pub struct PORTB;
impl PORTB {
}
impl Register for PORTB {
type T = u8;
const ADDRESS: *mut u8 = 0x38 as *mut u8;
}
#[allow(non_camel_case_types)]
pub struct DDRB;
impl DDRB {
}
impl Register for DDRB {
type T = u8;
const ADDRESS: *mut u8 = 0x37 as *mut u8;
}
#[allow(non_camel_case_types)]
pub struct PINB;
impl PINB {
}
impl Register for PINB {
type T = u8;
const ADDRESS: *mut u8 = 0x36 as *mut u8;
}
#[allow(non_camel_case_types)]
pub struct EEAR;
impl EEAR {
}
impl Register for EEAR {
type T = u8;
const ADDRESS: *mut u8 = 0x3e as *mut u8;
}
#[allow(non_camel_case_types)]
pub struct EEDR;
impl EEDR {
}
impl Register for EEDR {
type T = u8;
const ADDRESS: *mut u8 = 0x3d as *mut u8;
}
#[allow(non_camel_case_types)]
pub struct EECR;
impl EECR {
pub const EERIE: RegisterBits<Self> = RegisterBits::new(0x8);
pub const EERIE0: RegisterBits<Self> = RegisterBits::new(1<<3);
pub const EEMWE: RegisterBits<Self> = RegisterBits::new(0x4);
pub const EEMWE0: RegisterBits<Self> = RegisterBits::new(1<<2);
pub const EEWE: RegisterBits<Self> = RegisterBits::new(0x2);
pub const EEWE0: RegisterBits<Self> = RegisterBits::new(1<<1);
pub const EERE: RegisterBits<Self> = RegisterBits::new(0x1);
pub const EERE0: RegisterBits<Self> = RegisterBits::new(1<<0);
}
impl Register for EECR {
type T = u8;
const ADDRESS: *mut u8 = 0x3c as *mut u8;
}
#[allow(non_camel_case_types)]
pub struct WDTCR;
impl WDTCR {
pub const WDCE: RegisterBits<Self> = RegisterBits::new(0x10);
pub const WDCE0: RegisterBits<Self> = RegisterBits::new(1<<4);
pub const WDE: RegisterBits<Self> = RegisterBits::new(0x8);
pub const WDE0: RegisterBits<Self> = RegisterBits::new(1<<3);
pub const WDP: RegisterBits<Self> = RegisterBits::new(0x7);
pub const WDP0: RegisterBits<Self> = RegisterBits::new(1<<0);
pub const WDP1: RegisterBits<Self> = RegisterBits::new(1<<1);
pub const WDP2: RegisterBits<Self> = RegisterBits::new(1<<2);
}
impl Register for WDTCR {
type T = u8;
const ADDRESS: *mut u8 = 0x41 as *mut u8;
}
#[allow(non_camel_case_types)]
pub struct SREG;
impl SREG {
pub const I: RegisterBits<Self> = RegisterBits::new(0x80);
pub const I0: RegisterBits<Self> = RegisterBits::new(1<<7);
pub const T: RegisterBits<Self> = RegisterBits::new(0x40);
pub const T0: RegisterBits<Self> = RegisterBits::new(1<<6);
pub const H: RegisterBits<Self> = RegisterBits::new(0x20);
pub const H0: RegisterBits<Self> = RegisterBits::new(1<<5);
pub const S: RegisterBits<Self> = RegisterBits::new(0x10);
pub const S0: RegisterBits<Self> = RegisterBits::new(1<<4);
pub const V: RegisterBits<Self> = RegisterBits::new(0x8);
pub const V0: RegisterBits<Self> = RegisterBits::new(1<<3);
pub const N: RegisterBits<Self> = RegisterBits::new(0x4);
pub const N0: RegisterBits<Self> = RegisterBits::new(1<<2);
pub const Z: RegisterBits<Self> = RegisterBits::new(0x2);
pub const Z0: RegisterBits<Self> = RegisterBits::new(1<<1);
pub const C: RegisterBits<Self> = RegisterBits::new(0x1);
pub const C0: RegisterBits<Self> = RegisterBits::new(1<<0);
}
impl Register for SREG {
type T = u8;
const ADDRESS: *mut u8 = 0x5f as *mut u8;
}
#[allow(non_camel_case_types)]
pub struct SP;
impl SP {
}
impl Register for SP {
type T = u8;
const ADDRESS: *mut u8 = 0x5d as *mut u8;
}
#[allow(non_camel_case_types)]
pub struct MCUCR;
impl MCUCR {
pub const PUD: RegisterBits<Self> = RegisterBits::new(0x40);
pub const PUD0: RegisterBits<Self> = RegisterBits::new(1<<6);
pub const SE: RegisterBits<Self> = RegisterBits::new(0x20);
pub const SE0: RegisterBits<Self> = RegisterBits::new(1<<5);
pub const SM: RegisterBits<Self> = RegisterBits::new(0x18);
pub const SM0: RegisterBits<Self> = RegisterBits::new(1<<3);
pub const SM1: RegisterBits<Self> = RegisterBits::new(1<<4);
pub const ISC0: RegisterBits<Self> = RegisterBits::new(0x3);
pub const ISC00: RegisterBits<Self> = RegisterBits::new(1<<0);
pub const ISC01: RegisterBits<Self> = RegisterBits::new(1<<1);
}
impl Register for MCUCR {
type T = u8;
const ADDRESS: *mut u8 = 0x55 as *mut u8;
}
#[allow(non_camel_case_types)]
pub struct MCUSR;
impl MCUSR {
pub const WDRF: RegisterBits<Self> = RegisterBits::new(0x8);
pub const WDRF0: RegisterBits<Self> = RegisterBits::new(1<<3);
pub const BORF: RegisterBits<Self> = RegisterBits::new(0x4);
pub const BORF0: RegisterBits<Self> = RegisterBits::new(1<<2);
pub const EXTRF: RegisterBits<Self> = RegisterBits::new(0x2);
pub const EXTRF0: RegisterBits<Self> = RegisterBits::new(1<<1);
pub const PORF: RegisterBits<Self> = RegisterBits::new(0x1);
pub const PORF0: RegisterBits<Self> = RegisterBits::new(1<<0);
}
impl Register for MCUSR {
type T = u8;
const ADDRESS: *mut u8 = 0x54 as *mut u8;
}
#[allow(non_camel_case_types)]
pub struct OSCCAL;
impl OSCCAL {
pub const OSCCAL: RegisterBits<Self> = RegisterBits::new(0xff);
pub const OSCCAL0: RegisterBits<Self> = RegisterBits::new(1<<0);
pub const OSCCAL1: RegisterBits<Self> = RegisterBits::new(1<<1);
pub const OSCCAL2: RegisterBits<Self> = RegisterBits::new(1<<2);
pub const OSCCAL3: RegisterBits<Self> = RegisterBits::new(1<<3);
pub const OSCCAL4: RegisterBits<Self> = RegisterBits::new(1<<4);
pub const OSCCAL5: RegisterBits<Self> = RegisterBits::new(1<<5);
pub const OSCCAL6: RegisterBits<Self> = RegisterBits::new(1<<6);
pub const OSCCAL7: RegisterBits<Self> = RegisterBits::new(1<<7);
}
impl Register for OSCCAL {
type T = u8;
const ADDRESS: *mut u8 = 0x51 as *mut u8;
}
#[allow(non_camel_case_types)]
pub struct TIMSK;
impl TIMSK {
pub const TOIE0: RegisterBits<Self> = RegisterBits::new(0x2);
pub const TOIE00: RegisterBits<Self> = RegisterBits::new(1<<1);
}
impl Register for TIMSK {
type T = u8;
const ADDRESS: *mut u8 = 0x59 as *mut u8;
}
#[allow(non_camel_case_types)]
pub struct TIFR;
impl TIFR {
pub const TOV0: RegisterBits<Self> = RegisterBits::new(0x2);
pub const TOV00: RegisterBits<Self> = RegisterBits::new(1<<1);
}
impl Register for TIFR {
type T = u8;
const ADDRESS: *mut u8 = 0x58 as *mut u8;
}
#[allow(non_camel_case_types)]
pub struct TCCR0;
impl TCCR0 {
pub const PSR0: RegisterBits<Self> = RegisterBits::new(0x8);
pub const PSR00: RegisterBits<Self> = RegisterBits::new(1<<3);
pub const CS0: RegisterBits<Self> = RegisterBits::new(0x7);
pub const CS00: RegisterBits<Self> = RegisterBits::new(1<<0);
pub const CS01: RegisterBits<Self> = RegisterBits::new(1<<1);
pub const CS02: RegisterBits<Self> = RegisterBits::new(1<<2);
}
impl Register for TCCR0 {
type T = u8;
const ADDRESS: *mut u8 = 0x53 as *mut u8;
}
#[allow(non_camel_case_types)]
pub struct TCNT0;
impl TCNT0 {
}
impl Register for TCNT0 {
type T = u8;
const ADDRESS: *mut u8 = 0x52 as *mut u8;
}
#[allow(non_camel_case_types)]
pub struct TCCR1A;
impl TCCR1A {
pub const COM1A: RegisterBits<Self> = RegisterBits::new(0xc0);
pub const COM1A0: RegisterBits<Self> = RegisterBits::new(1<<6);
pub const COM1A1: RegisterBits<Self> = RegisterBits::new(1<<7);
pub const COM1B: RegisterBits<Self> = RegisterBits::new(0x30);
pub const COM1B0: RegisterBits<Self> = RegisterBits::new(1<<4);
pub const COM1B1: RegisterBits<Self> = RegisterBits::new(1<<5);
pub const FOC1A: RegisterBits<Self> = RegisterBits::new(0x8);
pub const FOC1A0: RegisterBits<Self> = RegisterBits::new(1<<3);
pub const FOC1B: RegisterBits<Self> = RegisterBits::new(0x4);
pub const FOC1B0: RegisterBits<Self> = RegisterBits::new(1<<2);
pub const PWM1A: RegisterBits<Self> = RegisterBits::new(0x2);
pub const PWM1A0: RegisterBits<Self> = RegisterBits::new(1<<1);
pub const PWM1B: RegisterBits<Self> = RegisterBits::new(0x1);
pub const PWM1B0: RegisterBits<Self> = RegisterBits::new(1<<0);
}
impl Register for TCCR1A {
type T = u8;
const ADDRESS: *mut u8 = 0x50 as *mut u8;
}
#[allow(non_camel_case_types)]
pub struct TCCR1B;
impl TCCR1B {
pub const CTC1: RegisterBits<Self> = RegisterBits::new(0x80);
pub const CTC10: RegisterBits<Self> = RegisterBits::new(1<<7);
pub const PSR1: RegisterBits<Self> = RegisterBits::new(0x40);
pub const PSR10: RegisterBits<Self> = RegisterBits::new(1<<6);
pub const CS1: RegisterBits<Self> = RegisterBits::new(0xf);
pub const CS10: RegisterBits<Self> = RegisterBits::new(1<<0);
pub const CS11: RegisterBits<Self> = RegisterBits::new(1<<1);
pub const CS12: RegisterBits<Self> = RegisterBits::new(1<<2);
pub const CS13: RegisterBits<Self> = RegisterBits::new(1<<3);
}
impl Register for TCCR1B {
type T = u8;
const ADDRESS: *mut u8 = 0x4f as *mut u8;
}
#[allow(non_camel_case_types)]
pub struct TCNT1;
impl TCNT1 {
}
impl Register for TCNT1 {
type T = u8;
const ADDRESS: *mut u8 = 0x4e as *mut u8;
}
#[allow(non_camel_case_types)]
pub struct OCR1A;
impl OCR1A {
}
impl Register for OCR1A {
type T = u8;
const ADDRESS: *mut u8 = 0x4d as *mut u8;
}
#[allow(non_camel_case_types)]
pub struct OCR1B;
impl OCR1B {
}
impl Register for OCR1B {
type T = u8;
const ADDRESS: *mut u8 = 0x4c as *mut u8;
}
#[allow(non_camel_case_types)]
pub struct OCR1C;
impl OCR1C {
}
impl Register for OCR1C {
type T = u8;
const ADDRESS: *mut u8 = 0x4b as *mut u8;
}
#[allow(non_camel_case_types)]
pub struct TIMSK;
impl TIMSK {
pub const OCIE1A: RegisterBits<Self> = RegisterBits::new(0x40);
pub const OCIE1A0: RegisterBits<Self> = RegisterBits::new(1<<6);
pub const OCIE1B: RegisterBits<Self> = RegisterBits::new(0x20);
pub const OCIE1B0: RegisterBits<Self> = RegisterBits::new(1<<5);
pub const TOIE1: RegisterBits<Self> = RegisterBits::new(0x4);
pub const TOIE10: RegisterBits<Self> = RegisterBits::new(1<<2);
}
impl Register for TIMSK {
type T = u8;
const ADDRESS: *mut u8 = 0x59 as *mut u8;
}
#[allow(non_camel_case_types)]
pub struct TIFR;
impl TIFR {
pub const OCF1A: RegisterBits<Self> = RegisterBits::new(0x40);
pub const OCF1A0: RegisterBits<Self> = RegisterBits::new(1<<6);
pub const OCF1B: RegisterBits<Self> = RegisterBits::new(0x20);
pub const OCF1B0: RegisterBits<Self> = RegisterBits::new(1<<5);
pub const TOV1: RegisterBits<Self> = RegisterBits::new(0x4);
pub const TOV10: RegisterBits<Self> = RegisterBits::new(1<<2);
}
impl Register for TIFR {
type T = u8;
const ADDRESS: *mut u8 = 0x58 as *mut u8;
}
#[allow(non_camel_case_types)]
pub struct PLLCSR;
impl PLLCSR {
pub const PCKE: RegisterBits<Self> = RegisterBits::new(0x4);
pub const PCKE0: RegisterBits<Self> = RegisterBits::new(1<<2);
pub const PLLE: RegisterBits<Self> = RegisterBits::new(0x2);
pub const PLLE0: RegisterBits<Self> = RegisterBits::new(1<<1);
pub const PLOCK: RegisterBits<Self> = RegisterBits::new(0x1);
pub const PLOCK0: RegisterBits<Self> = RegisterBits::new(1<<0);
}
impl Register for PLLCSR {
type T = u8;
const ADDRESS: *mut u8 = 0x49 as *mut u8;
}
#[allow(non_camel_case_types)]
pub struct GIMSK;
impl GIMSK {
pub const INT0: RegisterBits<Self> = RegisterBits::new(0x40);
pub const INT00: RegisterBits<Self> = RegisterBits::new(1<<6);
pub const PCIE: RegisterBits<Self> = RegisterBits::new(0x30);
pub const PCIE0: RegisterBits<Self> = RegisterBits::new(1<<4);
pub const PCIE1: RegisterBits<Self> = RegisterBits::new(1<<5);
}
impl Register for GIMSK {
type T = u8;
const ADDRESS: *mut u8 = 0x5b as *mut u8;
}
#[allow(non_camel_case_types)]
pub struct GIFR;
impl GIFR {
pub const INTF0: RegisterBits<Self> = RegisterBits::new(0x40);
pub const INTF00: RegisterBits<Self> = RegisterBits::new(1<<6);
pub const PCIF: RegisterBits<Self> = RegisterBits::new(0x20);
pub const PCIF0: RegisterBits<Self> = RegisterBits::new(1<<5);
}
impl Register for GIFR {
type T = u8;
const ADDRESS: *mut u8 = 0x5a as *mut u8;
}
pub mod port {
#![allow(unused_imports)]
use super::*;
use crate::Pin;
}
/// 8-bit timer.
pub struct Timer8;
impl modules::Timer8 for Timer8 {
type CompareA = OCR1A;
type CompareB = OCR1B;
type Counter = TCNT1;
type ControlA = TCCR1A;
type ControlB = TCCR1B;
type InterruptMask = TIMSK;
type InterruptFlag = TIFR;
const CS0: RegisterBits<Self::ControlB> = Self::ControlB::CS00;
const CS1: RegisterBits<Self::ControlB> = Self::ControlB::CS01;
const CS2: RegisterBits<Self::ControlB> = Self::ControlB::CS02;
const WGM0: RegisterBits<Self::ControlA> = Self::ControlA::WGM00;
const WGM1: RegisterBits<Self::ControlA> = Self::ControlA::WGM01;
const WGM2: RegisterBits<Self::ControlB> = Self::ControlB::WGM020;
const OCIEA: RegisterBits<Self::InterruptMask> = Self::InterruptMask::OCIE1A;
}

File diff suppressed because it is too large Load Diff

File diff suppressed because it is too large Load Diff

File diff suppressed because it is too large Load Diff

File diff suppressed because it is too large Load Diff

File diff suppressed because it is too large Load Diff

File diff suppressed because it is too large Load Diff

File diff suppressed because it is too large Load Diff

File diff suppressed because it is too large Load Diff

File diff suppressed because it is too large Load Diff

View File

@ -1,7 +1,69 @@
//! The primary module containing microcontroller-specific core definitions //! The primary module containing microcontroller-specific core definitions
/// The ATtiny85. /// The ATmega48PA.
#[cfg(any(avr_mcu_attiny85, feature = "all-mcus"))] pub mod attiny85; #[cfg(any(avr_mcu_atmega48pa, feature = "all-mcus"))] pub mod atmega48pa;
#[cfg(avr_mcu_attiny85)] pub use self::attiny85 as current; #[cfg(avr_mcu_atmega48pa)] pub use self::atmega48pa as current;
/// The ATmega328P.
#[cfg(any(avr_mcu_atmega328p, feature = "all-mcus"))] pub mod atmega328p;
#[cfg(avr_mcu_atmega328p)] pub use self::atmega328p as current;
/// The ATmega16U4.
#[cfg(any(avr_mcu_atmega16u4, feature = "all-mcus"))] pub mod atmega16u4;
#[cfg(avr_mcu_atmega16u4)] pub use self::atmega16u4 as current;
/// The ATmega88.
#[cfg(any(avr_mcu_atmega88, feature = "all-mcus"))] pub mod atmega88;
#[cfg(avr_mcu_atmega88)] pub use self::atmega88 as current;
/// The ATmega168A.
#[cfg(any(avr_mcu_atmega168a, feature = "all-mcus"))] pub mod atmega168a;
#[cfg(avr_mcu_atmega168a)] pub use self::atmega168a as current;
/// The ATmega48.
#[cfg(any(avr_mcu_atmega48, feature = "all-mcus"))] pub mod atmega48;
#[cfg(avr_mcu_atmega48)] pub use self::atmega48 as current;
/// The ATmega48A.
#[cfg(any(avr_mcu_atmega48a, feature = "all-mcus"))] pub mod atmega48a;
#[cfg(avr_mcu_atmega48a)] pub use self::atmega48a as current;
/// The ATmega88PA.
#[cfg(any(avr_mcu_atmega88pa, feature = "all-mcus"))] pub mod atmega88pa;
#[cfg(avr_mcu_atmega88pa)] pub use self::atmega88pa as current;
/// The ATmega328.
///
/// This device is chosen as the default when the crate is targeting non-AVR devices.
#[cfg(any(avr_mcu_atmega328, feature = "all-mcus", not(target_arch = "avr")))] pub mod atmega328;
#[cfg(any(avr_mcu_atmega328, not(target_arch = "avr")))] pub use self::atmega328 as current;
/// The ATmega168P.
#[cfg(any(avr_mcu_atmega168p, feature = "all-mcus"))] pub mod atmega168p;
#[cfg(avr_mcu_atmega168p)] pub use self::atmega168p as current;
/// The ATmega88P.
#[cfg(any(avr_mcu_atmega88p, feature = "all-mcus"))] pub mod atmega88p;
#[cfg(avr_mcu_atmega88p)] pub use self::atmega88p as current;
/// The ATmega168PA.
#[cfg(any(avr_mcu_atmega168pa, feature = "all-mcus"))] pub mod atmega168pa;
#[cfg(avr_mcu_atmega168pa)] pub use self::atmega168pa as current;
/// The ATmega48P.
#[cfg(any(avr_mcu_atmega48p, feature = "all-mcus"))] pub mod atmega48p;
#[cfg(avr_mcu_atmega48p)] pub use self::atmega48p as current;
/// The ATmega88A.
#[cfg(any(avr_mcu_atmega88a, feature = "all-mcus"))] pub mod atmega88a;
#[cfg(avr_mcu_atmega88a)] pub use self::atmega88a as current;
/// The ATmega32U4.
#[cfg(any(avr_mcu_atmega32u4, feature = "all-mcus"))] pub mod atmega32u4;
#[cfg(avr_mcu_atmega32u4)] pub use self::atmega32u4 as current;
/// The ATmega168.
#[cfg(any(avr_mcu_atmega168, feature = "all-mcus"))] pub mod atmega168;
#[cfg(avr_mcu_atmega168)] pub use self::atmega168 as current;