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This gets the screen working, though not correctly

This commit is contained in:
Savanni D'Gerinel 2024-11-11 09:33:45 -05:00
parent 2b291a3196
commit 8bc7a4c288
1 changed files with 36 additions and 24 deletions
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60
pico-st7789/src/main.rs
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@ -17,6 +17,10 @@ use rp_pico::{
const XOSC_CRYSTAL_FREQ: u32 = 12_000_000; // MHz, https://forums.raspberrypi.com/viewtopic.php?t=356764
const ROWS: usize = 320;
const COLUMNS: usize = 240;
const FRAMEBUF: usize = ROWS * COLUMNS * 3;
struct Step {
param_cnt: usize,
command: u8,
@ -36,8 +40,10 @@ impl Step {
{
let _ = data_command.set_low();
let _ = spi.write(&[self.command]);
let _ = data_command.set_high();
let _ = spi.write(&self.params[0..self.param_cnt]);
if self.param_cnt > 0 {
let _ = data_command.set_high();
let _ = spi.write(&self.params[0..self.param_cnt]);
}
}
}
@ -57,9 +63,9 @@ const SLPOUT: Step = Step {
};
const COLMOD: u8 = 0x3a;
const MADCTL: Step = Step {
param_cnt: 0,
param_cnt: 1,
command: 0x36,
params: [0, 0, 0, 0],
params: [0x08, 0, 0, 0],
delay: None,
};
const CASET: u8 = 0x2a;
@ -111,20 +117,20 @@ const SETUP_PROGRAM: [Step; 9] = [
Step {
param_cnt: 1,
command: COLMOD,
params: [0x55, 0, 0, 0],
params: [0x66, 0, 0, 0],
delay: Some(10),
},
MADCTL,
Step {
param_cnt: 4,
command: CASET,
params: [0, 0, 0, 170],
params: [0, 0, 0, 240],
delay: None,
},
Step {
param_cnt: 4,
command: RASET,
params: [0, 0, (340 as u16 >> 8) as u8, (320 as u16 & 0xff) as u8],
params: [0, 0, (320 >> 8) as u8, (320 & 0xff) as u8],
delay: None,
},
INVON,
@ -178,8 +184,8 @@ unsafe fn main() -> ! {
// let spi_sdi = pins.gpio4.into_function();
// Chip select 1 means the chip is not enabled
let mut board_select = pins.gpio13.into_function();
let mut data_command = pins.gpio14.into_function();
let mut reset = pins.gpio15.into_function();
let mut data_command = pins.gpio15.into_function();
let mut reset = pins.gpio14.into_function();
let _ = reset.set_low();
let _ = board_select.set_high();
@ -191,10 +197,10 @@ unsafe fn main() -> ! {
// The SPI system uses the peripheral clock
clocks.peripheral_clock.freq(),
// Transmit data at a rate of 1Mbit.
1_u32.MHz(),
32_u32.MHz(),
// Run with SPI Mode 1. This means that the clock line should start high and that data will
// be sampled starting at the first falling edge.
embedded_hal::spi::MODE_1,
embedded_hal::spi::MODE_3,
);
let _ = reset.set_high();
@ -208,18 +214,24 @@ unsafe fn main() -> ! {
}
}
let _ = data_command.set_low();
let _ = spi.write(&[RAMWR]);
let _ = data_command.set_high();
let mut bitmap: [u8; 86700] = [0; 86700];
for i in 0..28900 {
bitmap[i] = 0x55;
timer.delay_ms(1000);
let mut bitmap: [u8; FRAMEBUF] = [0; FRAMEBUF];
let mut i = 0;
loop {
let _ = board_select.set_low();
let _ = data_command.set_low();
let _ = spi.write(&[RAMWR]);
let _ = data_command.set_high();
let _ = spi.write(&bitmap);
let _ = board_select.set_high();
let color = i << 2;
bitmap = [color; FRAMEBUF];
i = if i >= 64 { 0 } else { i + 1 };
timer.delay_ms(10);
}
let _ = spi.write(&bitmap);
let _ = data_command.set_low();
let _ = spi.write(&[NOP]);
let _ = board_select.set_high();
loop {}
}