2016-07-06 23:59:51 +00:00
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//! Definitions of register addresses and bits within those registers
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#![feature(asm)]
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#![feature(no_core)]
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2017-07-16 02:49:22 +00:00
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#![feature(const_fn)]
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2017-09-23 05:09:24 +00:00
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#![feature(associated_consts)]
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2017-11-17 04:18:35 +00:00
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#![feature(associated_type_defaults)]
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#![feature(const_fn)]
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2017-09-23 05:09:24 +00:00
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#![feature(lang_items)]
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#![feature(unwind_attributes)]
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2017-07-16 02:49:22 +00:00
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2016-07-06 23:59:51 +00:00
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#![no_core]
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2017-08-29 13:48:44 +00:00
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#![no_std]
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2017-11-17 04:18:35 +00:00
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pub use self::register::{Bitset, Mask, Register, RegisterValue};
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2017-08-29 13:48:44 +00:00
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pub use self::pin::Pin;
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2017-12-13 09:24:16 +00:00
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pub use self::timer::Timer8;
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2017-08-30 13:37:56 +00:00
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pub use self::usart::HardwareUsart;
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2016-07-06 23:59:51 +00:00
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pub mod prelude;
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2017-08-29 13:48:44 +00:00
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pub mod serial;
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2016-07-06 23:59:51 +00:00
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pub mod timer0;
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pub mod timer1;
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2017-08-29 13:48:44 +00:00
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pub mod cores;
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2017-08-30 14:24:24 +00:00
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pub mod spi;
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2017-11-17 04:18:35 +00:00
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pub mod config;
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2017-08-30 14:24:24 +00:00
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2017-09-23 04:50:01 +00:00
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mod register;
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2017-08-29 13:48:44 +00:00
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mod pin;
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2017-08-30 13:37:56 +00:00
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mod usart;
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2017-12-13 09:24:16 +00:00
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mod timer;
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2017-09-23 05:09:24 +00:00
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#[doc(hidden)]
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pub mod std_stub;
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2017-08-29 13:48:44 +00:00
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pub enum DataDirection {
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Input,
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Output,
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}
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2016-07-06 23:59:51 +00:00
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macro_rules! bit {
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(-, $pos:expr) => {};
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($name:ident, $pos:expr) => {
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pub const $name: u8 = 1 << $pos;
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};
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}
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macro_rules! register {
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($address:expr, $name:ident, [$b7:tt, $b6:tt, $b5:tt, $b4:tt, $b3:tt, $b2:tt, $b1:tt, $b0:tt]) => {
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register!($address, $name);
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bit!($b7, 7);
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bit!($b6, 6);
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bit!($b5, 5);
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bit!($b4, 4);
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bit!($b3, 3);
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bit!($b2, 2);
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bit!($b1, 1);
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bit!($b0, 0);
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};
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($address:expr, $name:ident) => {
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pub const $name: *mut u8 = $address as *mut u8;
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};
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}
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register!(0xC6, UDR0 );
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register!(0xC5, UBRR0H );
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register!(0xC4, UBRR0L );
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register!(0xC2, UCSR0C, [UMSEL01, UMSEL00, UPM01, UPM00, USBS0, UCSZ01, UCSZ00, UCPOL0 ]);
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register!(0xC1, UCSR0B, [RXCIE0, TXCIE0, UDRIE0, RXEN0, TXEN0, UCSZ02, RXB80, TXB80 ]);
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register!(0xC0, UCSR0A, [RXC0, TXC0, UDRE0, FE0, DOR0, UPE0, U2X0, MPCM0 ]);
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register!(0xBD, TWAMR, [TWAM6, TWAM5, TWAM4, TWAM3, TWAM2, TWAM1, TWAM0, - ]);
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register!(0xBC, TWCR, [TWINT, TWEA, TWSTA, TWSTO, TWWC, TWEN, -, TWIE ]);
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register!(0xBB, TWDR );
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register!(0xBA, TWAR, [TWA6, TWA5, TWA4, TWA3, TWA2, TWA1, TWA0, TWGCE ]);
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register!(0xB9, TWSR, [TWS7, TWS6, TWS5, TWS4, TWS3, -, TWPS1, TWPS0 ]);
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register!(0xB8, TWBR );
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register!(0xB6, ASSR, [-, EXCLK, AS2, TCN2UB, OCR2AUB, OCR2BUB, TCR2AUB, TCR2BUB]);
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register!(0xB4, OCR2B );
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register!(0xB3, OCR2A );
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register!(0xB2, TCNT2 );
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register!(0xB1, TCCR2B, [FOC2A, FOC2B, -, -, WGM22, CS22, CS21, CS20 ]);
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register!(0xB0, TCCR2A, [COM2A1, COM2A0, COM2B1, COM2B0, -, -, WGM21, WGM20 ]);
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register!(0x8B, OCR1BH );
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register!(0x8A, OCR1BL );
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register!(0x89, OCR1AH );
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register!(0x88, OCR1AL );
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register!(0x87, ICR1H );
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register!(0x86, ICR1L );
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register!(0x85, TCNT1H );
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register!(0x84, TCNT1L );
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register!(0x82, TCCR1C, [FOC1A, FOC1B, -, -, -, -, -, - ]);
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register!(0x81, TCCR1B, [ICNC1, ICES1, -, WGM13, WGM12, CS12, CS11, CS10 ]);
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register!(0x80, TCCR1A, [COM1A1, COM1A0, COM1B1, COM1B0, -, -, WGM11, WGM10 ]);
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register!(0x7F, DIDR1, [-, -, -, -, -, -, AIN1D, AIN0D ]);
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register!(0x7E, DIDR0, [-, -, ADC5D, ADC4D, ADC3D, ADC2D, ADC1D, ADC0D ]);
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register!(0x7C, ADMUX, [REFS1, REFS0, ADLAR, -, MUX3, MUX2, MUX1, MUX0 ]);
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register!(0x7B, ADCSRB, [-, ACME, -, -, -, ADTS2, ADTS1, ADTS0 ]);
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register!(0x7A, ADCSRA, [ADEN, ADSC, ADATE, ADIF, ADIE, ADPS2, ADPS1, ADPS0 ]);
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register!(0x79, ADCH );
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register!(0x78, ADCL );
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register!(0x70, TIMSK2, [-, -, -, -, -, OCIE2B, OCIE2A, TOIE2 ]);
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register!(0x6F, TIMSK1, [-, -, ICIE1, -, -, OCIE1B, OCIE1A, TOIE1 ]);
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register!(0x6E, TIMSK0, [-, -, -, -, -, OCIE0B, OCIE0A, TOIE0 ]);
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register!(0x6D, PCMSK2, [PCINT23, PCINT22, PCINT21, PCINT20, PCINT19, PCINT18, PCINT17, PCINT16]);
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register!(0x6C, PCMSK1, [-, PCINT14, PCINT13, PCINT12, PCINT11, PCINT10, PCINT9, PCINT8 ]);
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register!(0x6B, PCMSK0, [PCINT7, PCINT6, PCINT5, PCINT4, PCINT3, PCINT2, PCINT1, PCINT0 ]);
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register!(0x69, EICRA, [-, -, -, -, ISC11, ISC10, ISC01, ISC00 ]);
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register!(0x68, PCICR, [-, -, -, -, -, PCIE2, PCIE1, PCIE0 ]);
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register!(0x66, OSCCAL );
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register!(0x64, PRR, [PRTWI, PRTIM2, PRTIM0, -, PRTIM1, PRSPI, PRUSART0,PRADC ]);
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register!(0x61, CLKPR, [CLKPCE, -, -, -, CLKPS3, CLKPS2, CLKPS1, CLKPS0 ]);
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register!(0x60, WDTCSR, [WDIF, WDIE, WDP3, WDCE, WDE, WDP2, WDP1, WDP0 ]);
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register!(0x5F, SREG, [I, T, H, S, V, N, Z, C ]);
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register!(0x5E, SPH, [-, -, -, -, -, SP10, SP9, SP8 ]);
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register!(0x5D, SPL, [SP7, SP6, SP5, SP4, SP3, SP2, SP1, SP0 ]);
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register!(0x57, SPMCSR, [SPMIE, RWWSB, SIGRD, RWWSRE, BLBSET, PGWRT, PGERS, SPMEN ]);
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register!(0x55, MCUCR, [-, BODS, BODSE, PUD, -, -, IVSEL, IVCE ]);
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register!(0x54, MCUSR, [-, -, -, -, WDRF, BORF, EXTRF, PORF ]);
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register!(0x53, SMCR, [-, -, -, -, SM2, SM1, SM0, SE ]);
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register!(0x50, ACSR, [ACD, ACBG, ACO, ACI, ACIE, ACIC, ACIS1, ACIS0 ]);
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register!(0x4E, SPDR );
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register!(0x4D, SPSR, [SPIF, WCOL, -, -, -, -, -, SPI2X ]);
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register!(0x4C, SPCR, [SPIE, SPE, DORD, MSTR, CPOL, CPHA, SPR1, SPR0 ]);
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register!(0x4B, GPIOR2 );
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register!(0x4A, GPIOR1 );
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register!(0x48, OCR0B );
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register!(0x47, OCR0A );
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register!(0x46, TCNT0 );
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register!(0x45, TCCR0B, [FOC0A, FOC0B, -, -, WGM02, CS02, CS01, CS00 ]);
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register!(0x44, TCCR0A, [COM0A1, COM0A0, COM0B1, COM0B0, -, -, WGM01, WGM00 ]);
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register!(0x43, GTCCR, [TSM, -, -, -, -, -, PSRASY, PSRSYNC]);
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register!(0x42, EEARH );
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register!(0x41, EEARL );
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register!(0x40, EEDR );
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register!(0x3F, EECR, [-, -, EEPM1, EEPM0, EERIE, EEMPE, EEPE, EERE ]);
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register!(0x3E, GPIOR0 );
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register!(0x3D, EIMSK, [-, -, -, -, -, -, INT1, INT0 ]);
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register!(0x3C, EIFR, [-, -, -, -, -, -, INTF1, INTF0 ]);
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register!(0x3B, PCIFR, [-, -, -, -, -, PCIF2, PCIF1, PCIF0 ]);
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register!(0x37, TIFR2, [-, -, -, -, -, OCF2B, OCF2A, TOV2 ]);
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register!(0x36, TIFR1, [-, -, ICF1, -, -, OCF1B, OCF1A, TOV1 ]);
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register!(0x35, TIFR0, [-, -, -, -, -, OCF0B, OCF0A, TOV0 ]);
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register!(0x2B, PORTD, [PORTD7, PORTD6, PORTD5, PORTD4, PORTD3, PORTD2, PORTD1, PORTD0 ]);
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register!(0x2A, DDRD, [DDD7, DDD6, DDD5, DDD4, DDD3, DDD2, DDD1, DDD0 ]);
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register!(0x29, PIND, [PIND7, PIND6, PIND5, PIND4, PIND3, PIND2, PIND1, PIND0 ]);
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register!(0x28, PORTC, [-, PORTC6, PORTC5, PORTC4, PORTC3, PORTC2, PORTC1, PORTC0 ]);
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register!(0x27, DDRC, [-, DDC6, DDC5, DDC4, DDC3, DDC2, DDC1, DDC0 ]);
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register!(0x26, PINC, [-, PINC6, PINC5, PINC4, PINC3, PINC2, PINC1, PINC0 ]);
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register!(0x25, PORTB, [PORTB7, PORTB6, PORTB5, PORTB4, PORTB3, PORTB2, PORTB1, PORTB0 ]);
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register!(0x24, DDRB, [DDB7, DDB6, DDB5, DDB4, DDB3, DDB2, DDB1, DDB0 ]);
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register!(0x23, PINB, [PINB7, PINB6, PINB5, PINB4, PINB3, PINB2, PINB1, PINB0 ]);
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// 16-bit register pairs
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pub const ADC: *mut u16 = ADCL as *mut u16;
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pub const EEAR: *mut u16 = EEARL as *mut u16;
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pub const ICR1: *mut u16 = ICR1L as *mut u16;
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pub const OCR1A: *mut u16 = OCR1AL as *mut u16;
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pub const OCR1B: *mut u16 = OCR1BL as *mut u16;
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pub const OSCCA: *mut u16 = OSCCAL as *mut u16;
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pub const SP: *mut u16 = SPL as *mut u16;
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pub const TCNT1: *mut u16 = TCNT1L as *mut u16;
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pub const UBRR0: *mut u16 = UBRR0L as *mut u16;
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// Aliases
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pub const UDORD0: u8 = UCSZ01;
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pub const UCPHA0: u8 = UCSZ00;
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