Add CS, PDI, and PDO pins

This has the side effect of adding atmega32u4 and atmega16u4

core_generator/src/gen.rs

@@ -1,6 +1,8 @@
 use avr_mcu::*;
-use std::io;
-use std::io::prelude::*;
+use std::{
+    collections::HashMap,
+    io::{self, prelude::*},
+};
 
 pub fn write_registers(mcu: &Mcu, w: &mut dyn Write) -> Result<(), io::Error> {
     for register in mcu.registers() {
@@ -108,6 +110,14 @@ pub fn write_pins(mcu: &Mcu, w: &mut dyn Write) -> Result<(), io::Error> {
     Ok(())
 }
 
+#[derive(Clone, Copy, Debug, PartialEq, Eq, Hash)]
+enum SpiPinType {
+    SerialDataIn,
+    SerialDataOut,
+    Clock,
+    ChipSelect,
+}
+
 pub fn write_spi_modules(mcu: &Mcu, w: &mut dyn Write) -> Result<(), io::Error> {
     if let Some(module) = mcu.module("SPI") {
         let peripheral = mcu
@@ -119,6 +129,7 @@ pub fn write_spi_modules(mcu: &Mcu, w: &mut dyn Write) -> Result<(), io::Error>
         writeln!(w)?;
         writeln!(w, "impl modules::HardwareSpi for Spi {{")?;
 
+        let mut pins: HashMap<SpiPinType, String> = HashMap::new();
         for spi_signal in peripheral.signals() {
             let spi_signal_name = spi_signal
                 .group
@@ -130,14 +141,21 @@ pub fn write_spi_modules(mcu: &Mcu, w: &mut dyn Write) -> Result<(), io::Error>
             let pin_name = self::pin_name(port_instance, port_signal);
 
             let const_name = match &spi_signal_name[..] {
-                "MISO" => "SerialDataIn",
-                "MOSI" => "SerialDataOut",
-                "SCK" => "Clock",
-                "SS" => "ChipSelect",
+                "MISO" => SpiPinType::SerialDataIn,
+                "MOSI" => SpiPinType::SerialDataOut,
+                "SCK" => SpiPinType::Clock,
+                "SS" => SpiPinType::ChipSelect,
+                "CS" => SpiPinType::ChipSelect,
+                "PDI" => SpiPinType::SerialDataOut,
+                "PDO" => SpiPinType::SerialDataIn,
                 _ => panic!("unknown spi signal name: '{}'", spi_signal_name),
             };
 
-            writeln!(w, "    type {} = {};", const_name, pin_name)?;
+            pins.insert(const_name, pin_name);
+        }
+
+        for (pin_type, pin_name) in pins.into_iter() {
+            writeln!(w, "    type {:?} = {};", pin_type, pin_name)?;
         }
 
         for reg in module.registers() {

core_generator/src/main.rs

@@ -116,7 +116,9 @@ const DISABLE_FOR_DEVICES: &'static [&'static str] = &[
 fn base_output_path() -> PathBuf {
     match std::env::args().skip(1).next() {
         Some(path) => Path::new(&path).to_owned(),
-        None => panic!("please pass a destination path for the generated cores on the command line"),
+        None => {
+            panic!("please pass a destination path for the generated cores on the command line")
+        }
     }
 }
 
@@ -137,17 +139,27 @@ fn main() {
         fs::create_dir_all(&cores_path()).expect("could not create cores directory");
     }
 
+    // let microcontrollers = vec![avr_mcu::microcontroller("atmega32u4")];
     let microcontrollers = avr_mcu::microcontrollers();
-    let (count_total, mut cores_successful, mut cores_failed) = (microcontrollers.len(), Vec::new(), Vec::new());
+    let (count_total, mut cores_successful, mut cores_failed) =
+        (microcontrollers.len(), Vec::new(), Vec::new());
 
     for (i, mcu) in microcontrollers.iter().enumerate() {
-        if DISABLE_FOR_DEVICES.iter().any(|d| mcu.device.name == *d || core_module_name(mcu) == *d) {
+        if DISABLE_FOR_DEVICES
+            .iter()
+            .any(|d| mcu.device.name == *d || core_module_name(mcu) == *d)
+        {
             println!("skipping generation of core for '{}'", mcu.device.name);
             continue;
         }
 
         let result = std::panic::catch_unwind(|| {
-            println!("generating core for '{}' ({} of {})", mcu.device.name, i + 1, count_total);
+            println!(
+                "generating core for '{}' ({} of {})",
+                mcu.device.name,
+                i + 1,
+                count_total
+            );
             generate_cores(&[mcu.clone()]).unwrap();
         });
 
@@ -155,7 +167,7 @@ fn main() {
             Ok(..) => {
                 println!("successfully generated core for '{}'", mcu.device.name);
                 cores_successful.push(mcu);
-            },
+            }
             Err(e) => {
                 delete_core_module(mcu).unwrap(); // Don't leave around broken core files.
 
@@ -165,12 +177,18 @@ fn main() {
                     String::new()
                 };
 
-                eprintln!("failed to generate core for '{}', skipping: {}\n", mcu.device.name, error_message);
+                eprintln!(
+                    "failed to generate core for '{}', skipping: {}\n",
+                    mcu.device.name, error_message
+                );
                 cores_failed.push(mcu);
-            },
+            }
         }
     }
-    println!("generating 'src/cores/mod.rs' for the {} successfully generated cores", cores_successful.len());
+    println!(
+        "generating 'src/cores/mod.rs' for the {} successfully generated cores",
+        cores_successful.len()
+    );
     generate_cores_mod_rs(&cores_successful[..]).expect("failed to generates src/cores/mod.rs");
 
     println!("statistics:");
@@ -201,7 +219,10 @@ fn generate_cores_mod_rs(mcus: &[&Mcu]) -> Result<(), io::Error> {
     let path = cores_path().join("mod.rs");
     let mut w = File::create(&path)?;
 
-    writeln!(w, "//! The primary module containing microcontroller-specific core definitions")?;
+    writeln!(
+        w,
+        "//! The primary module containing microcontroller-specific core definitions"
+    )?;
     writeln!(w)?;
 
     for mcu in mcus {
@@ -224,9 +245,17 @@ fn generate_cores_mod_rs(mcus: &[&Mcu]) -> Result<(), io::Error> {
             writeln!(w, "///\n/// This device is chosen as the default when the crate is targeting non-AVR devices.")?;
         }
 
-        writeln!(w, "#[cfg(any(avr_mcu_{}, feature = \"all-mcus\"{}))] pub mod {};", module_name, cfg_check_default_fallback, module_name)?;
+        writeln!(
+            w,
+            "#[cfg(any(avr_mcu_{}, feature = \"all-mcus\"{}))] pub mod {};",
+            module_name, cfg_check_default_fallback, module_name
+        )?;
 
-        writeln!(w, "#[cfg({})] pub use self::{} as current;", current_module_check, module_name)?;
+        writeln!(
+            w,
+            "#[cfg({})] pub use self::{} as current;",
+            current_module_check, module_name
+        )?;
         writeln!(w)?;
     }
     writeln!(w)
@@ -246,4 +275,3 @@ fn write_core_module(mcu: &Mcu, w: &mut dyn Write) -> Result<(), io::Error> {
 
     writeln!(w)
 }
-

src/cores/atmega168.rs

@@ -1792,9 +1792,9 @@ pub struct Spi;
 
 impl modules::HardwareSpi for Spi {
     type ChipSelect = port::B2;
-    type SerialDataOut = port::B3;
     type SerialDataIn = port::B4;
     type Clock = port::B5;
+    type SerialDataOut = port::B3;
     type DataRegister = SPDR;
     type StatusRegister = SPSR;
     type ControlRegister = SPCR;

src/cores/atmega168a.rs

@@ -1794,10 +1794,10 @@ pub mod port {
 pub struct Spi;
 
 impl modules::HardwareSpi for Spi {
-    type ChipSelect = port::B2;
     type SerialDataOut = port::B3;
-    type SerialDataIn = port::B4;
+    type ChipSelect = port::B2;
     type Clock = port::B5;
+    type SerialDataIn = port::B4;
     type DataRegister = SPDR;
     type StatusRegister = SPSR;
     type ControlRegister = SPCR;

src/cores/atmega168pa.rs

@@ -1800,8 +1800,8 @@ pub mod port {
 pub struct Spi;
 
 impl modules::HardwareSpi for Spi {
-    type ChipSelect = port::B2;
     type SerialDataOut = port::B3;
+    type ChipSelect = port::B2;
     type SerialDataIn = port::B4;
     type Clock = port::B5;
     type DataRegister = SPDR;

src/cores/atmega328.rs

@@ -2040,10 +2040,10 @@ pub mod port {
 pub struct Spi;
 
 impl modules::HardwareSpi for Spi {
-    type ChipSelect = port::B2;
-    type SerialDataOut = port::B3;
-    type SerialDataIn = port::B4;
     type Clock = port::B5;
+    type SerialDataOut = port::B3;
+    type ChipSelect = port::B2;
+    type SerialDataIn = port::B4;
     type DataRegister = SPDR;
     type StatusRegister = SPSR;
     type ControlRegister = SPCR;

src/cores/atmega328p.rs

@@ -1802,8 +1802,8 @@ pub struct Spi;
 impl modules::HardwareSpi for Spi {
     type ChipSelect = port::B2;
     type SerialDataOut = port::B3;
-    type SerialDataIn = port::B4;
     type Clock = port::B5;
+    type SerialDataIn = port::B4;
     type DataRegister = SPDR;
     type StatusRegister = SPSR;
     type ControlRegister = SPCR;

src/cores/atmega48.rs

@@ -1773,10 +1773,10 @@ pub mod port {
 pub struct Spi;
 
 impl modules::HardwareSpi for Spi {
-    type ChipSelect = port::B2;
-    type SerialDataOut = port::B3;
     type SerialDataIn = port::B4;
+    type ChipSelect = port::B2;
     type Clock = port::B5;
+    type SerialDataOut = port::B3;
     type DataRegister = SPDR;
     type StatusRegister = SPSR;
     type ControlRegister = SPCR;

src/cores/atmega48a.rs

@@ -1798,9 +1798,9 @@ pub mod port {
 pub struct Spi;
 
 impl modules::HardwareSpi for Spi {
-    type ChipSelect = port::B2;
     type SerialDataOut = port::B3;
     type SerialDataIn = port::B4;
+    type ChipSelect = port::B2;
     type Clock = port::B5;
     type DataRegister = SPDR;
     type StatusRegister = SPSR;

src/cores/atmega48p.rs

@@ -1780,9 +1780,9 @@ pub struct Spi;
 
 impl modules::HardwareSpi for Spi {
     type ChipSelect = port::B2;
-    type SerialDataOut = port::B3;
     type SerialDataIn = port::B4;
     type Clock = port::B5;
+    type SerialDataOut = port::B3;
     type DataRegister = SPDR;
     type StatusRegister = SPSR;
     type ControlRegister = SPCR;

src/cores/atmega48pa.rs

@@ -1804,10 +1804,10 @@ pub mod port {
 pub struct Spi;
 
 impl modules::HardwareSpi for Spi {
-    type ChipSelect = port::B2;
     type SerialDataOut = port::B3;
     type SerialDataIn = port::B4;
     type Clock = port::B5;
+    type ChipSelect = port::B2;
     type DataRegister = SPDR;
     type StatusRegister = SPSR;
     type ControlRegister = SPCR;

src/cores/atmega88a.rs

@@ -1794,9 +1794,9 @@ pub mod port {
 pub struct Spi;
 
 impl modules::HardwareSpi for Spi {
-    type ChipSelect = port::B2;
     type SerialDataOut = port::B3;
     type SerialDataIn = port::B4;
+    type ChipSelect = port::B2;
     type Clock = port::B5;
     type DataRegister = SPDR;
     type StatusRegister = SPSR;

src/cores/atmega88p.rs

@@ -1798,9 +1798,9 @@ pub struct Spi;
 
 impl modules::HardwareSpi for Spi {
     type ChipSelect = port::B2;
+    type Clock = port::B5;
     type SerialDataOut = port::B3;
     type SerialDataIn = port::B4;
-    type Clock = port::B5;
     type DataRegister = SPDR;
     type StatusRegister = SPSR;
     type ControlRegister = SPCR;

src/cores/atmega88pa.rs

@@ -1800,9 +1800,9 @@ pub mod port {
 pub struct Spi;
 
 impl modules::HardwareSpi for Spi {
-    type ChipSelect = port::B2;
     type SerialDataOut = port::B3;
     type SerialDataIn = port::B4;
+    type ChipSelect = port::B2;
     type Clock = port::B5;
     type DataRegister = SPDR;
     type StatusRegister = SPSR;

src/cores/mod.rs

@@ -8,6 +8,10 @@
 #[cfg(any(avr_mcu_atmega328p, feature = "all-mcus"))] pub mod atmega328p;
 #[cfg(avr_mcu_atmega328p)] pub use self::atmega328p as current;
 
+/// The ATmega16U4.
+#[cfg(any(avr_mcu_atmega16u4, feature = "all-mcus"))] pub mod atmega16u4;
+#[cfg(avr_mcu_atmega16u4)] pub use self::atmega16u4 as current;
+
 /// The ATmega88.
 #[cfg(any(avr_mcu_atmega88, feature = "all-mcus"))] pub mod atmega88;
 #[cfg(avr_mcu_atmega88)] pub use self::atmega88 as current;
@@ -54,6 +58,10 @@
 #[cfg(any(avr_mcu_atmega88a, feature = "all-mcus"))] pub mod atmega88a;
 #[cfg(avr_mcu_atmega88a)] pub use self::atmega88a as current;
 
+/// The ATmega32U4.
+#[cfg(any(avr_mcu_atmega32u4, feature = "all-mcus"))] pub mod atmega32u4;
+#[cfg(avr_mcu_atmega32u4)] pub use self::atmega32u4 as current;
+
 /// The ATmega168.
 #[cfg(any(avr_mcu_atmega168, feature = "all-mcus"))] pub mod atmega168;
 #[cfg(avr_mcu_atmega168)] pub use self::atmega168 as current;

src/modules/spi/mod.rs

@@ -11,7 +11,11 @@ use crate::{Pin, Register};
 /// Information at [maxembedded.com](http://maxembedded.com/2013/11/the-spi-of-the-avr/).
 pub trait HardwareSpi {
     type SerialDataIn: Pin;
+<<<<<<< Updated upstream
     type SerialDataOu: Pin;
+=======
+    type SerialDataOut: Pin;
+>>>>>>> Stashed changes
     type Clock: Pin;
     type ChipSelect: Pin;